PIC24FJ128GB106-I/PT Microchip Technology, PIC24FJ128GB106-I/PT Datasheet - Page 69
![IC PIC MCU FLASH 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ128GB106-I/PT
Manufacturer Part Number
PIC24FJ128GB106-I/PT
Description
IC PIC MCU FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ128GB106-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM183026 - KIT EVALUATION PIC16F/PIC24FDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128GB106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- PIC24FJ192GB108-IPT PDF datasheet #4
- Current page: 69 of 352
- Download datasheet (3Mb)
5.6.2
If a Flash location has been erased, it can be pro-
grammed using table write instructions to write an
instruction word (24-bit) into the write latch. The
TBLPAG register is loaded with the 8 Most Significant
Bytes of the Flash address. The TBLWTL and TBLWTH
instructions write the desired data into the write latches
EXAMPLE 5-7:
EXAMPLE 5-8:
2009 Microchip Technology Inc.
; Setup a pointer to data Program Memory
; Setup NVMCON for programming one word to data Program Memory
// C example using MPLAB C30
//Set up NVMCON for word programming
//Set up pointer to the first memory location to be written
//Perform TBLWT instructions to write latches
MOV
MOV
MOV
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
unsigned int offset;
unsigned long progAddr = 0xXXXXXX;
unsigned int progDataL = 0xXXXX;
unsigned char progDataH = 0xXX;
NVMCON = 0x4003;
TBLPAG = progAddr>>16;
offset = progAddr & 0xFFFF;
__builtin_tblwtl(offset, progDataL);
__builtin_tblwth(offset, progDataH);
asm(“DISI #5”);
__builtin_write_NVM();
PROGRAMMING A SINGLE WORD
OF FLASH PROGRAM MEMORY
#tblpage(PROG_ADDR), W0
W0, TBLPAG
#tbloffset(PROG_ADDR), W0
#LOW_WORD, W2
#HIGH_BYTE, W3
#0x4003, W0
W0, NVMCON
#5
#0x55, W0
W0, NVMKEY
#0xAA, W0
W0, NVMKEY
NVMCON, #WR
PROGRAMMING A SINGLE WORD OF FLASH PROGRAM MEMORY
(ASSEMBLY LANGUAGE CODE)
PROGRAMMING A SINGLE WORD OF FLASH PROGRAM MEMORY
(C LANGUAGE CODE)
PIC24FJ256GB110 FAMILY
;
;Initialize PM Page Boundary SFR
;Initialize a register with program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
; Set NVMOP bits to 0011
; Disable interrupts while the KEY sequence is written
; Write the key sequence
; Start the write cycle
; Insert two NOPs after the erase
; Command is asserted
// Address of word to program
// Data to program lower word
// Data to program upper byte
// Initialize NVMCON
// Initialize PM Page Boundary SFR
// Initialize lower word of address
// Write to address low word
// Write to upper byte
// Block interrupts with priority < 7
// for next 5 instructions
// C30 function to perform unlock
// sequence and set WR
and specify the lower 16 bits of the program memory
address to write to. To configure the NVMCON register
for a word write, set the NVMOP bits (NVMCON<3:0>)
to ‘0011’. The write is performed by executing the
unlock sequence and setting the WR bit, as shown in
Example 5-7. An equivalent procedure in C, using the
MPLAB C30 compiler and built-in hardware functions,
is shown in Example 5-8.
DS39897C-page 69
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