PIC18F4431-I/P Microchip Technology, PIC18F4431-I/P Datasheet - Page 209
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
IC PIC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
8.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/SPI/SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18F2431-ISP PDF datasheet #8
- Current page: 209 of 392
- Download datasheet (4Mb)
FIGURE 19-1:
2010 Microchip Technology Inc.
SDO
SCK
SDI
SS
Peripheral OE
Read
SS Control
TRISC<3>
Select
Edge
Enable
bit 0
Select
Edge
SSPBUF Reg
SSP BLOCK DIAGRAM
(SPI MODE)
SSPSR Reg
Clock Select
SSPM<3:0>
4
2
Prescaler
Write
4, 16, 64
Clock
TMR2 Output
Shift
Data Bus
Internal
2
PIC18F2331/2431/4331/4431
T
CY
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>), must be set. To reset or reconfigure
SPI mode, clear bit SSPEN, reinitialize the SSPCON
register and then set bit SSPEN. This configures the
SDI, SDO, SCK and SS pins as serial port pins. For the
pins to behave as the serial port function, they must
have their data direction bits (in the TRISC register)
appropriately programmed. That is:
• Serial Data Out (SDO) – RC7/RX/DT/SDO or
• SDI must have TRISC<4> or TRISD<2> set
• SDO must have TRISC<7> or TRISD<1> cleared
• SCK (Master mode) must have TRISC<5> or
• SCK (Slave mode) must have TRISC<5> or
• SS must have TRISA<6> set
RD1/SDO
TRISD<3> cleared
TRISD<3> set
Note 1: When the SPI is in Slave mode, with
2: If the SPI is used in Slave mode with
3: When the SPI is in Slave mode with SS pin
the
(SSPCON<3:0> = 0100),
module will reset if the SS pin is set to
V
CKE = 1, then the SS pin control must be
enabled.
control enabled (SSPCON<3:0> = 0100),
the state of the SS pin can affect the state
read back from the TRISC<6> bit. The
peripheral OE signal from the SSP module
into PORTC controls the state that is read
back from the TRISC<6> bit (see
Section 11.3 “PORTC, TRISC and LATC
Registers”
Read-Modify-Write instructions, such as
BSF, are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<6> bit to be set, thus disabling the
SDO output.
DD
.
SS
for information on PORTC). If
pin
control
DS39616D-page 209
the
enabled,
SPI
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