DSPIC33FJ128GP206-I/PT Microchip Technology, DSPIC33FJ128GP206-I/PT Datasheet - Page 317
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DSPIC33FJ128GP206-I/PT
Manufacturer Part Number
DSPIC33FJ128GP206-I/PT
Description
IC DSPIC MCU/DSP 128K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
4.DSPIC33FJ128MC506-IPT.pdf
(24 pages)
Specifications of DSPIC33FJ128GP206-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Program Address Space ..................................................... 33
Program Memory
R
Reader Response ............................................................. 318
Registers
© 2009 Microchip Technology Inc.
Clock Frequency and Switching................................ 147
Construction................................................................ 66
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation...................... 67
Memory Map ............................................................... 33
Table Read Instructions
Visibility Operation ...................................................... 69
Interrupt Vector ........................................................... 34
Organization................................................................ 34
Reset Vector ............................................................... 34
ADxCHS0 (ADCx Input Channel 0 Select................. 234
ADxCHS123 (ADCx Input Channel 1, 2, 3 Select) ... 233
ADxCON1 (ADCx Control 1)..................................... 228
ADxCON2 (ADCx Control 2)..................................... 230
ADxCON3 (ADCx Control 3)..................................... 231
ADxCON4 (ADCx Control 4)..................................... 232
ADxCSSH (ADCx Input Scan Select High)............... 235
ADxCSSL (ADCx Input Scan Select Low) ................ 235
ADxPCFGH (ADCx Port Configuration High) ........... 236
ADxPCFGL (ADCx Port Configuration Low)............. 236
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 204
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 205
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 205
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 206
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 202
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 203
CiCTRL1 (ECAN Control 1) ...................................... 194
CiCTRL2 (ECAN Control 2) ...................................... 195
CiEC (ECAN Transmit/Receive Error Count)............ 201
CiFCTRL (ECAN FIFO Control)................................ 197
CiFEN1 (ECAN Acceptance Filter Enable) ............... 204
CiFIFO (ECAN FIFO Status)..................................... 198
CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)..... 208,
CiINTE (ECAN Interrupt Enable) .............................. 200
CiINTF (ECAN Interrupt Flag)................................... 199
CiRXFnEID (ECAN Acceptance Filter n Extended Identi-
CiRXFnSID (ECAN Acceptance Filter n Standard Identi-
CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 211
CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 211
CiRXMnEID (ECAN Acceptance Filter Mask n Extended
CiRXMnSID (ECAN Acceptance Filter Mask n Standard
CiRXOVF1 (ECAN Receive Buffer Overflow 1) ........ 212
CiRXOVF2 (ECAN Receive Buffer Overflow 2) ........ 212
CiTRBnDLC (ECAN Buffer n Data Length Control) .. 215
CiTRBnDm (ECAN Buffer n Data Field Byte m) ....... 215
CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 214
CiTRBnSID (ECAN Buffer n Standard Identifier) ...... 214
CiTRBnSTAT (ECAN Receive Buffer n Status) ........ 216
CiTRmnCON (ECAN TX/RX Buffer m Control)......... 213
CiVEC (ECAN Interrupt Code).................................. 196
Space Visibility.................................................... 69
tions .................................................................... 68
TBLRDH ............................................................. 68
TBLRDL .............................................................. 68
209
fier).................................................................... 207
fier).................................................................... 207
Identifier) ........................................................... 210
Identifier) ........................................................... 210
dsPIC33FJXXXGPX06/X08/X10
CLKDIV (Clock Divisor) ............................................ 142
CORCON (Core Control)...................................... 26, 86
DCICON1 (DCI Control 1) ........................................ 219
DCICON2 (DCI Control 2) ........................................ 220
DCICON3 (DCI Control 3) ........................................ 221
DCISTAT (DCI Status) ............................................. 222
DMACS0 (DMA Controller Status 0) ........................ 133
DMACS1 (DMA Controller Status 1) ........................ 135
DMAxCNT (DMA Channel x Transfer Count)........... 132
DMAxCON (DMA Channel x Control)....................... 129
DMAxPAD (DMA Channel x Peripheral Address) .... 132
DMAxREQ (DMA Channel x IRQ Select) ................. 130
DMAxSTA (DMA Channel x RAM Start Address A) . 131
DMAxSTB (DMA Channel x RAM Start Address B) . 131
DSADR (Most Recent DMA RAM Address) ............. 136
I2CxCON (I2Cx Control)........................................... 179
I2CxMSK (I2Cx Slave Mode Address Mask)............ 183
I2CxSTAT (I2Cx Status) ........................................... 181
ICxCON (Input Capture x Control)............................ 166
IEC0 (Interrupt Enable Control 0) ............................... 98
IEC1 (Interrupt Enable Control 1) ............................. 100
IEC2 (Interrupt Enable Control 2) ............................. 102
IEC3 (Interrupt Enable Control 3) ............................. 104
IEC4 (Interrupt Enable Control 4) ............................. 105
IFS0 (Interrupt Flag Status 0) ..................................... 90
IFS1 (Interrupt Flag Status 1) ..................................... 92
IFS2 (Interrupt Flag Status 2) ..................................... 94
IFS3 (Interrupt Flag Status 3) ..................................... 96
IFS4 (Interrupt Flag Status 4) ..................................... 97
INTCON1 (Interrupt Control 1) ................................... 87
INTCON2 (Interrupt Control 2) ................................... 89
INTTREG Interrupt Control and Status Register ...... 124
IPC0 (Interrupt Priority Control 0) ............................. 106
IPC1 (Interrupt Priority Control 1) ............................. 107
IPC10 (Interrupt Priority Control 10) ......................... 116
IPC11 (Interrupt Priority Control 11) ......................... 117
IPC12 (Interrupt Priority Control 12) ......................... 118
IPC13 (Interrupt Priority Control 13) ......................... 119
IPC14 (Interrupt Priority Control 14) ......................... 120
IPC15 (Interrupt Priority Control 15) ......................... 121
IPC16 (Interrupt Priority Control 16) ......................... 122
IPC17 (Interrupt Priority Control 17) ......................... 123
IPC2 (Interrupt Priority Control 2) ............................. 108
IPC3 (Interrupt Priority Control 3) ............................. 109
IPC4 (Interrupt Priority Control 4) ............................. 110
IPC5 (Interrupt Priority Control 5) ............................. 111
IPC6 (Interrupt Priority Control 6) ............................. 112
IPC7 (Interrupt Priority Control 7) ............................. 113
IPC8 (Interrupt Priority Control 8) ............................. 114
IPC9 (Interrupt Priority Control 9) ............................. 115
NVMCOM (Flash Memory Control) ...................... 73, 74
OCxCON (Output Compare x Control) ..................... 169
OSCCON (Oscillator Control)................................... 140
OSCTUN (FRC Oscillator Tuning)............................ 144
PLLFBD (PLL Feedback Divisor) ............................. 143
PMD1 (Peripheral Module Disable Control Register 1) ..
PMD2 (Peripheral Module Disable Control Register 2) ..
PMD3 (Peripheral Module Disable Control Register 3) ..
RCON (Reset Control)................................................ 78
RSCON (DCI Receive Slot Control) ......................... 223
SPIxCON1 (SPIx Control 1) ..................................... 173
SPIxCON2 (SPIx Control 2) ..................................... 175
149
151
153
DS70286C-page 315