DSPIC33FJ128GP202-I/SP Microchip Technology, DSPIC33FJ128GP202-I/SP Datasheet - Page 69

• Manufacturer Part Number: DSPIC33FJ128GP202-I/SP
• Description: IC DSPIC MCU/DSP 128K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP202-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• On-chip Dac: 2-chx16-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA330019 - PIM DSPIC33F MC 44P-100P QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 4-9:
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Note 1: The Least Significant bit (LSb) of program space addresses is always fixed as ‘0’ to maintain
Program Counter
Table Operations
Program Space Visibility
(Remapping)
2: Table operations are not required to be word aligned. Table read operations are permitted
word alignment of data in the program and data spaces.
in the configuration memory space.
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
(2)
(1)
User/Configuration
(1)
Space Select
1/0
0
0
TBLPAG
8 bits
PSVPAG
8 bits
Select
Program Counter
1
24 bits
23 bits
23 bits
15 bits
16 bits
EA
EA
Byte Select
1/0
DS70292E-page 69
0
0