DSPIC33FJ128MC202-I/SO Microchip Technology, DSPIC33FJ128MC202-I/SO Datasheet - Page 3
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DSPIC33FJ128MC202-I/SO
Manufacturer Part Number
DSPIC33FJ128MC202-I/SO
Description
IC DSPIC MCU/DSP 128K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
2.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
3.DSPIC33FJ64MC202-ESO.pdf
(424 pages)
Specifications of DSPIC33FJ128MC202-I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Comparator
Audio DAC
Operations
Regulator
Module
Internal
Voltage
ECAN
ECAN
RTCC
UART
UART
PWM
PWM
JTAG
CPU
ADC
PSV
QEI
QEI
SPI
All
Only those issues indicated in the last column apply to the current silicon revision.
Specifications
Accumulation
Accumulation
Consumption
Debug Mode
During Reset
DOZE Mode
Timer Gated
Timer Gated
Sleep Mode
Sleep Mode
SILICON ISSUE SUMMARY (CONTINUED)
Generation
Output Pin
Instruction
Operation
Operation
Character
Operation
Operation
Boundary
IR Mode
Transmit
Feature
Receive
in Sleep
Current
Voltage
150ºC
Break
Mode
Mode
Mode
EXCH
Scan
—
Number
Item
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
29.
28.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When CMCON<CxOUTEN> bit is set, the Comparator
output pin cannot be used as a general purpose I/O pin
even if the Comparator is disabled.
When the VREGS bit (RCON<8>) is set to a logic ‘0’ the
device may reset and higher Sleep current may be
observed.
An address error trap occurs in certain addressing
modes when accessing the first four bytes of any PSV
page.
The WAKIF bit in the CxINTF register cannot be cleared
by software instruction after the device is interrupted
from Sleep due to activity on the CAN bus.
The ECAN module may not store the received data in the
correct location.
The EXCH instruction does not execute correctly.
PTMR does not keep counting down after halting code
execution in Debug mode.
The Motor Control PWM module generates more
interrupts than expected when DOZE mode is used and
the output postscaler value is different than 1:1.
Writing to the SPIxBUF register as soon as TBF bit is
cleared will cause SPI module to ignore written data.
The UART module will not generate back-to-back Break
characters.
When Timer Gated Accumulation is enabled, the QEI
does not generate an interrupt on every falling edge.
When Timer Gated Accumulation is enabled, and an
external signal is applied, the POSCNT increments and
generates an interrupt after a match with MAXCNT.
The Audio DAC positive and negative output differential
voltages may not meet the specifications listed in the
data sheet.
If the ADC module is in an enabled state when the
device enters Sleep Mode, the power-down current (I
of the device may exceed the device data sheet
specifications.
On 28-pin devices, Boundary Scan does not function
correctly for pin 7.
The RTCC module gets reset on any device Reset,
instead of getting reset only on a POR or BOR.
These revisions of silicon only support 140ºC operation
instead of 150ºC for Hi-Temp operating temperature.
Issue Summary
®
encoder/decoder
PD
)
A1 A2 A3 A4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DS80442F-page 3
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X