PIC16C71-20I/P Microchip Technology, PIC16C71-20I/P Datasheet - Page 12

IC MCU OTP 1KX14 A/D 18DIP

PIC16C71-20I/P

Manufacturer Part Number
PIC16C71-20I/P
Description
IC MCU OTP 1KX14 A/D 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C71-20I/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
36Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
36 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C71-20I/P
Manufacturer:
Microchip Technology
Quantity:
1 915
Part Number:
PIC16C71-20I/P
Manufacturer:
MICROCHIP
Quantity:
20 000
PIC16C71X
4.2
The data memory is partitioned into two Banks which
contain the General Purpose Registers and the Special
Function Registers. Bit RP0 is the bank select bit.
RP0 (STATUS<5>) = 1
RP0 (STATUS<5>) = 0
Each Bank extends up to 7Fh (128 bytes). The lower
locations of each Bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers implemented as
static RAM. Both Bank 0 and Bank 1 contain special
function registers. Some "high use" special function
registers from Bank 0 are mirrored in Bank 1 for code
reduction and quicker access.
4.2.1
The register file can be accessed either directly, or indi-
rectly
(Section 4.5).
DS30272A-page 12
through
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
the
File
Bank 1
Bank 0
Select
Register
FSR
FIGURE 4-4:
Note 1: Not a physical register.
Address
0Ch
0Ah
0Bh
2Fh
7Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
30h
File
2: The PCON register is not implemented on the
3: These locations are unimplemented in Bank 1.
Unimplemented data memory locations, read
as '0'.
PIC16C71.
Any access to these locations will access the
corresponding Bank 0 register.
ADCON0
PCLATH
INTCON
STATUS
Purpose
Register
General
PORTB
ADRES
INDF
PORTA
Bank 0
TMR0
PCL
FSR
PIC16C710/71 REGISTER FILE
MAP
(1)
1997 Microchip Technology Inc.
in Bank 0
ADCON1
Purpose
OPTION
PCON
PCLATH
INTCON
Register
Mapped
STATUS
General
ADRES
INDF
Bank 1
TRISA
TRISB
PCL
FSR
(1)
(2)
(3)
Address
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
AFh
B0h
FFh
File

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