PIC18LF2331-I/SP Microchip Technology, PIC18LF2331-I/SP Datasheet - Page 19
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PIC18LF2331-I/SP
Manufacturer Part Number
PIC18LF2331-I/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF2331-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.4
The ID locations are programmed much like the code
memory except that multi-panel writes must be dis-
abled. The single panel that will be written will automat-
ically be enabled based on the value of the table
pointer. The ID registers are mapped in addresses
200000h through 200007h. These locations read out
normally even after code protection.
TABLE 3-7:
In order to modify the ID locations, refer to the method-
ology described in Section 3.2.2, “Modifying Code
Memory”. As with code memory, the ID locations must
be erased before modified.
2010 Microchip Technology Inc.
Step 1: Direct access to config memory.
Step 2: Configure device for single panel writes.
Step 3: Direct access to code memory.
Step 4: Load write buffer. Panel will be automatically determined by address.
Command
0000
0000
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
4-Bit
ID Location Programming
8E A6
8C A6
0E 3C
6E F8
0E 00
6E F7
0E 06
6E F6
00 00
8E A6
9C A6
0E 20
6E F8
0E 00
6E F7
0E 00
6E F6
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
00 00
WRITE ID SEQUENCE
Data Payload
BSF
BSF
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 06h
MOVWF TBLPTRL
Write 00h to 3C0006h to enable single panel writes.
BSF
BCF
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and start programming
NOP - hold SCLK high for time P9
PIC18F2331/2431/4331/4431
EECON1, EEPGD
EECON1, CFGS
EECON1, EEPGD
EECON1, CFGS
Table 3-7 demonstrates the code sequence required to
write the ID locations.
Note:
Core Instruction
Even though multi-panel writes are dis-
abled, the user must still fill the 8-byte data
buffer for the panel.
DS30500B-page 19