PIC24HJ64GP206-I/PT Microchip Technology, PIC24HJ64GP206-I/PT Datasheet - Page 19

• Manufacturer Part Number: PIC24HJ64GP206-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP206-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 13
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 18 Channel
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.0
The PIC24H CPU module has a 16-bit (data) modified
Harvard architecture with an enhanced instruction set
and addressing modes. The CPU has a 24-bit instruction
word with a variable length opcode field. The Program
Counter (PC) is 23 bits wide and addresses up to 4M x
24 bits of user program memory space. The actual
amount of program memory implemented varies by
device. A single-cycle instruction prefetch mechanism is
used to help maintain throughput and provides
predictable execution. All instructions execute in a single
cycle, with the exception of instructions that change the
program flow, the double word move (MOV.D) instruction
and the table instructions. Overhead-free, single-cycle
program loop constructs are supported using the
REPEAT instruction, which is interruptible at any point.
The PIC24H devices have sixteen, 16-bit working
registers in the programmer’s model. Each of the working
registers can serve as a data, address or address offset
register. The 16th working register (W15) operates as a
software Stack Pointer (SP) for interrupts and calls.
The PIC24H instruction set includes many addressing
modes and is designed for optimum C compiler
efficiency. For most instructions, the PIC24H is capable
of executing a data (or program data) memory read, a
working register (data) read, a data memory write and
a program (instruction) memory read per instruction
cycle. As a result, three parameter instructions can be
supported, allowing A + B = C operations to be
executed in a single cycle.
A block diagram of the CPU is shown in Figure 2-1,
and the programmer’s model for the PIC24H is shown
in Figure 2-2.
2.1
The data space can be linearly addressed as 32K words
or 64 Kbytes using an Address Generation Unit (AGU).
The upper 32 Kbytes of the data space memory map can
optionally be mapped into program space at any 16K pro-
gram word boundary defined by the 8-bit Program Space
Visibility Page (PSVPAG) register. The program to data
space mapping feature lets any instruction access pro-
gram space as if it were data space.
The data space also includes 2 Kbytes of DMA RAM,
which is primarily used for DMA data transfers, but may
be used as general purpose RAM.
© 2006 Microchip Technology Inc.
Note:
CPU
Data Addressing Overview
This data sheet summarizes the features
of this group of PIC24H devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
Preliminary
2.2
The PIC24H features a 17-bit by 17-bit, single-cycle
multiplier. The multiplier can perform signed, unsigned
and mixed-sign multiplication. Using a 17-bit by 17-bit
multiplier for 16-bit by 16-bit multiplication makes
mixed-sign multiplication possible.
The PIC24H supports 16/16 and 32/16 integer divide
operations.
operations. They must be executed within a REPEAT
loop, resulting in a total execution time of 19 instruction
cycles. The divide operation can be interrupted during
any of those 19 cycles without loss of data.
A multi-bit data shifter is used to perform up to a 16-bit,
left or right shift in a single cycle.
Special MCU Features
All
divide
instructions
PIC24H
DS70175C-page 17
are
iterative