PIC24HJ64GP206-I/PT Microchip Technology, PIC24HJ64GP206-I/PT Datasheet - Page 11
![IC PIC MCU FLASH 32KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24HJ64GP206-I/PT
Manufacturer Part Number
PIC24HJ64GP206-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206-IPT.pdf
(292 pages)
3.PIC24HJ64GP206-IPT.pdf
(8 pages)
4.PIC24HJ64GP206-IPT.pdf
(20 pages)
5.PIC24HJ64GP206-IPT.pdf
(26 pages)
6.PIC24HJ128GP206-IPT.pdf
(286 pages)
7.PIC24HJ128GP306-IPT.pdf
(288 pages)
Specifications of PIC24HJ64GP206-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
13
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 18 Channel
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
13
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Height
1 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
Microchi
Quantity:
297
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PIC24HJ64GP206-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
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Manufacturer:
MICROCHIP
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PIC24HJ64GP206-I/PT
Manufacturer:
Microchip Technology
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Manufacturer:
MICROCHIP/微芯
Quantity:
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9. Module: SPI
10. Module: ECAN
11. Module: ECAN
© 2010 Microchip Technology Inc.
The SMP bit (SPIxCON1<9>, where x = 1 or 2)
does not have any effect when the SPI module is
configured for a 1:1 prescale factor in Master
mode. In this mode, whether the SMP bit is set or
cleared, the data is always sampled at the end of
data output time.
Work around
If sampling at the middle of data output time is
required, then configure the SPI module to use a
clock prescale factor other than 1:1, using the
PPRE<1:0>
SPIxCON1 register.
Affected Silicon Revisions
If any buffers other than Buffer 0 are enabled as
transmit buffers (i.e., if the TXEN bits other than
TXEN0 are set to ‘1’), incorrect ID and data
transmissions will occur intermittently.
Work around
Enable only Buffer 0 for transmission.
Affected Silicon Revisions
Under specific conditions, the first five bits of a
transmitted identifier may not match the value in
the transmit buffer SID. If the ECAN module
detects a Start-of-Frame (SOF) in the third bit of
interframe space, and if a message to be
transmitted is pending, the first five bits of the
transmitted identifier may be corrupted.
Work around
None.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
X
A4
A4
A4
and
X
X
X
SPRE<2:0>
bits
in
the
PIC24HJXXXGPX06/X08/X10
12. Module: ECAN
13. Module: I
14. Module: ADC
The ECAN module (ECAN1 or ECAN2) does not
function correctly in Loopback mode.
Work around
Do not use Loopback mode.
Affected Silicon Revisions
The Bus Collision Status bit (BCL) is not set when
a bus collision occurs during a Restart or Stop
event. However, the BCL bit is set when a bus
collision occurs during a Start event.
Work around
None.
Affected Silicon Revisions
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep or Idle mode if the
SMPI bits are non-zero. That is, if the ADC is
configured to generate an interrupt after a certain
number of INT0 triggered conversions, the ADC
conversions will not be triggered and the device
will remain in Sleep. The ADC will perform
conversions and wake-up the device only when it
is configured to generate an interrupt after each
INT0 triggered conversion (SMPI<3:0> = 0000).
Work around
None. If an ADC event trigger from the INT0 pin is
required, initialize SMPI<3:0> to ‘0000’ (interrupt
on every conversion).
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
X
2
C
A4
A4
A4
X
X
X
DS80444D-page 11