DSPIC33FJ64GP204-I/ML Microchip Technology, DSPIC33FJ64GP204-I/ML Datasheet - Page 110

• Manufacturer Part Number: DSPIC33FJ64GP204-I/ML
• Description: IC DSPIC MCU/DSP 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: ECAN, I2C, JTAG, SPI, UART
• No. Of I/o's: 35
• Flash Memory Size: 64KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 7-14:
DS70292D-page 110
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
DAC1LIE
Note 1: Interrupts disabled on devices without ECAN™ modules.
R/W-0
U-0
—
2: Interrupts disabled on devices without Audio DAC modules.
(2)
DAC1LIE: DAC Left Channel Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DAC1RIE: DAC Right Channel Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
C1TXIE: ECAN1 Transmit Data Request Interrupt Enable bit
1 = Interrupt request occurred
0 = Interrupt request not occurred
DMA7IE: DMA Channel 7 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA6IE: DMA Channel 6 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
CRCIE: CRC Generator Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U2EIE: UART2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1EIE: UART1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
DAC1RIE
C1TXIE
R/W-0
R/W-0
IEC4: INTERRUPT ENABLE CONTROL REGISTER 4
(1)
(2)
W = Writable bit
‘1’ = Bit is set
DMA7IE
R/W-0
U-0
—
DMA6IE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CRCIE
R/W-0
U-0
—
(2)
(2)
(1)
U2EIE
R/W-0
U-0
—
 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
U1EIE
U-0
—
U-0
U-0
—
—
bit 8
bit 0