PIC16F873A-I/SP Microchip Technology, PIC16F873A-I/SP Datasheet - Page 2

IC MCU FLASH 4KX14 EE 28DIP

PIC16F873A-I/SP

Manufacturer Part Number
PIC16F873A-I/SP
Description
IC MCU FLASH 4KX14 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F873A-I/SP

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F873AI/SP

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PIC16F87XA
2. Module: Flash Program Memory
EXAMPLE 1:
DS80128F-page 2
BCF
NOP
BSF
NOP
NOP
NOP
NOP
NOP
NOP
BSF
To ensure proper reading of data from tables in
Flash
Section 3.5 of the Device Data Sheet, the following
work around is necessary.
INTCON, GIE
EECON1, RD
INTCON, GIE
Program
Memory,
;Disable the interrupts
;This NOP is required for the workaround.
;This initiates program memory read.
;Any instructions here are ignored while program memory is read in the
;second instruction cycle after BSF EECON1, RD.
;These four NOP's are required for the workaround.
;Enable the interrupts
as
described
in
Work around
A software workaround will enable Flash program
memory to function as published. One NOP should
precede and six NOPs should follow the instruction
that sets the read bit.
Replace the required 3-instruction sequence,
shown in Example 3-3 of the Data Sheet, with the
sequence shown in Example 1 (below). The
interrupts should be disabled during this process.
This problem is specific to Rev. B0 and has been
resolved by Rev. B2 of the silicon (date codes later
than 0242xxx).
 2003 Microchip Technology Inc.

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