PIC16F737-I/SS Microchip Technology, PIC16F737-I/SS Datasheet - Page 287

IC PIC MCU FLASH 4KX14 28SSOP

PIC16F737-I/SS

Manufacturer Part Number
PIC16F737-I/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F737-I/SS

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI, USART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F737-I/SS
Manufacturer:
MIC
Quantity:
50
Part Number:
PIC16F737-I/SS
Manufacturer:
MICRO
Quantity:
33
Part Number:
PIC16F737-I/SS
Manufacturer:
MIC
Quantity:
20 000
Section 17. MSSP
17.3.3
Typical Connection
Figure 17-5
shows a typical connection between two microcontrollers. The master controller
(Processor 1) initiates the data transfer by sending the SCK signal. Data is shifted out of both
shift registers on their programmed clock edge, and latched on the opposite edge of the clock.
Both processors should be programmed to same Clock Polarity (CKP), then both controllers
would send and receive data at the same time. Whether the data is meaningful (or dummy data)
depends on the application software. This leads to three scenarios for data transmission:
• Master sends data — Slave sends dummy data
• Master sends data — Slave sends data
• Master sends dummy data — Slave sends data
17
Figure 17-5:
SPI Master/Slave Connection
SPI Master SSPM3:SSPM0 = 00xxb
SPI Slave SSPM3:SSPM0 = 010xb
SDO
SDI
Serial Input Buffer
Serial Input Buffer
(SSPBUF)
(SSPBUF)
SDI
SDO
Shift Register
Shift Register
(SSPSR)
(SSPSR)
LSb
MSb
MSb
LSb
Serial Clock
SCK
SCK
PROCESSOR 1
PROCESSOR 2
Preliminary
1997 Microchip Technology Inc.
DS31017A-page 17-11

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