PIC16C71-04/SO Microchip Technology, PIC16C71-04/SO Datasheet - Page 79

• Manufacturer Part Number: PIC16C71-04/SO
• Description: IC MCU OTP 1KX14 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C71-04/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 36 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 36Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MIL309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
OPTION
Operands:
Syntax:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example
1997 Microchip Technology Inc.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
Load Option Register
[ label ]
None
(W)
The contents of the W register are
loaded in the OPTION register. This
instruction is supported for code com-
patibility with PIC16C5X products.
Since OPTION is a readable/writable
register, the user can directly address
it.
1
1
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
Decode
NOP
Q1
00
00
OPTION
NOP
OPTION
0000
0000
NOP
Q2
0110
0xx0
NOP
Q3
0010
0000
NOP
Q4
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Return from Interrupt
[ label ]
None
TOS
1
None
Return from Interrupt. Stack is POPed
and Top of Stack (TOS) is loaded in
the PC. Interrupts are enabled by set-
ting Global Interrupt Enable bit, GIE
(INTCON<7>). This is a two cycle
instruction.
1
2
After Interrupt
Decode
RETFIE
NOP
Q1
00
GIE
PIC16C71X
PC,
PC =
GIE =
RETFIE
0000
NOP
NOP
Q2
DS30272A-page 79
TOS
1
0000
Set the
GIE bit
NOP
Q3
the Stack
Pop from
1001
NOP
Q4