ATMEGA32A-PU Atmel, ATMEGA32A-PU Datasheet - Page 277
ATMEGA32A-PU
Manufacturer Part Number
ATMEGA32A-PU
Description
MCU AVR 32K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32A-PU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Rom Size
1024 B
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32A-PU
Manufacturer:
ATMEL
Quantity:
3 000
Company:
Part Number:
ATMEGA32A-PU
Manufacturer:
Atmel
Quantity:
26 792
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26.7.9
26.7.10
26.7.11
8155C–AVR–02/11
Programming the Fuse High Bits
Programming the Lock Bits
Reading the Fuse and Lock Bits
The algorithm for programming the Fuse high bits is as follows (refer to
on page 272
Figure 26-5. Programming the Fuses
The algorithm for programming the Lock bits is as follows (refer to
page 272
The Lock bits can only be cleared by executing Chip Erase.
The algorithm for reading the Fuse and Lock bits is as follows (refer to
on page 272
3. Set BS1 to “0” and BS2 to “0”.
4. Give WR a negative pulse and wait for RDY/BSY to go high.
1. A: Load Command “0100 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
3. Set BS1 to “1” and BS2 to “0”. This selects high data byte.
4. Give WR a negative pulse and wait for RDY/BSY to go high.
5. Set BS1 to “0”. This selects low data byte.
1. A: Load Command “0010 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs the Lock bit.
3. Give WR a negative pulse and wait for RDY/BSY to go high.
RESET +12V
for details on Command and Data loading):
RDY/BSY
for details on Command and Data loading):
for details on Command loading):
PAGEL
XTAL1
DATA
XA1
XA0
BS1
BS2
WR
OE
$40
A
DATA
C
Write Fuse Low byte
XX
$40
A
DATA
C
“Programming the Flash” on
Write Fuse high byte
“Programming the Flash”
“Programming the Flash”
ATmega32A
XX
277
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