PIC24FJ64GA102-I/ML Microchip Technology, PIC24FJ64GA102-I/ML Datasheet - Page 203
![IC MCU 16BIT 64KB FLASH 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24FJ64GA102-I/ML
Manufacturer Part Number
PIC24FJ64GA102-I/ML
Description
IC MCU 16BIT 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
4.PIC24FJ64GA104-IML.pdf
(300 pages)
Specifications of PIC24FJ64GA102-I/ML
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, USART
No. Of Pwm Channels
5
Embedded Interface Type
I2C, LIN, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA102-I/ML
Manufacturer:
MAXIM
Quantity:
15 620
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GA102-ISP PDF datasheet #3
- PIC24FJ64GA104-IML PDF datasheet #4
- Current page: 203 of 308
- Download datasheet (3Mb)
19.2.4
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
Note 1:
RTCEN
R/W-0
R/W-0
CAL7
2:
3:
(2)
The RCFGCAL register is only affected by a POR.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
RTCC CONTROL REGISTERS
RTCEN: RTCC Enable bit
1 = RTCC module is enabled
0 = RTCC module is disabled
Unimplemented: Read as ‘0’
RTCWREN: RTCC Value Registers Write Enable bit
1 = RTCVALH and RTCVALL registers can be written to by the user
0 = RTCVALH and RTCVALL registers are locked out from being written to by the user
RTCSYNC: RTCC Value Registers Read Synchronization bit
1 = RTCVALH, RTCVALL and ALCFGRPT registers can change while reading due to a rollover ripple
0 = RTCVALH, RTCVALL or ALCFGRPT registers can be read without concern over a rollover ripple
HALFSEC: Half Second Status bit
1 = Second half period of a second
0 = First half period of a second
RTCOE: RTCC Output Enable bit
1 = RTCC output is enabled
0 = RTCC output is disabled
RTCPTR<1:0>: RTCC Value Register Window Pointer bits
Points to the corresponding RTCC Value registers when reading the RTCVALH and RTCVALL registers.
The RTCPTR<1:0> value decrements on every read or write of RTCVALH until it reaches ‘00’.
RTCVAL<15:8>:
00 = MINUTES
01 = WEEKDAY
10 = MONTH
11 = Reserved
RTCVAL<7:0>:
00 = SECONDS
01 = HOURS
10 = DAY
11 = YEAR
R/W-0
CAL6
resulting in an invalid data read. If the register is read twice and results in the same data, the data
can be assumed to be valid.
U-0
—
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
RTCWREN
R/W-0
R/W-0
CAL5
(2)
RTCSYNC
R-0, HSC
R/W-0
CAL4
(3)
PIC24FJ64GA104 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HALFSEC
R-0, HSC
R/W-0
CAL3
(3)
RTCOE
R/W-0
R/W-0
CAL2
x = Bit is unknown
RTCPTR1
R/W-0
R/W-0
CAL1
(1)
DS39951C-page 203
RTCPTR0
R/W-0
R/W-0
CAL0
bit 8
bit 0
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