DSPIC33FJ32MC202-I/MM Microchip Technology, DSPIC33FJ32MC202-I/MM Datasheet - Page 147
![IC DSPIC MCU/DSP 32K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ32MC202-I/MM
Manufacturer Part Number
DSPIC33FJ32MC202-I/MM
Description
IC DSPIC MCU/DSP 32K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
5.DSPIC33FJ32MC204-IPT.pdf
(304 pages)
Specifications of DSPIC33FJ32MC202-I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Price
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- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC302-ISO PDF datasheet #4
- DSPIC33FJ32MC204-IPT PDF datasheet #5
- Current page: 147 of 320
- Download datasheet (5Mb)
12.0
The Timer2/3 feature has three 2-bit timers that can
also be configured as two independent 16-bit timers
with selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (e.g., Timer2 and
• Single 32-bit timer (Timer2/3)
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit period register match
• Time base for Input Capture and Output Compare
• ADC1 event trigger (Timer2/3 only)
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger. The
operating modes and enabled features are determined
by setting the appropriate bit(s) in the T2CON, T3CON
registers. T2CON registers are shown in generic form
in
Register
For 32-bit timer/counter operation, Timer2 is the least
significant word (lsw), and Timer3 is the most
significant word (msw) of the 32-bit timers.
© 2011 Microchip Technology Inc.
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
modules (Timer2 and Timer3 only)
Note:
Note 1: This data sheet summarizes the features
Register
2: Some registers and associated bits
TIMER2/3 FEATURE
12-2.
For 32-bit operation, T3CON control bits
are ignored. Only T2CON control bits are
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer modules, but an interrupt is
generated with the Timer3 interrupt flags.
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 11. “Timers” (DS70205) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
12-1. T3CON registers are shown in
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
in
12.1
To configure the Timer2/3 feature timers for 32-bit
operation:
1.
2.
3.
4.
5.
6.
The timer value at any point is stored in the register
pair, TMR3:TMR2, which always contains the most sig-
nificant word of the count, while TMR2 contains the
least significant word.
12.2
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the T32 control bit.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
Load the timer period value. PR3 contains the
most significant word of the value, while PR2
contains the least significant word.
If interrupts are required, set the interrupt enable
bit, T3IE. Use the priority bits, T3IP<2:0>, to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3
interrupt.
Set the corresponding TON bit.
Clear the T32 bit corresponding to that timer.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit.
32-bit Operation
16-bit Operation
DS70283H-page 147
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