DSPIC33FJ32MC202-I/MM Microchip Technology, DSPIC33FJ32MC202-I/MM Datasheet - Page 213
![IC DSPIC MCU/DSP 32K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ32MC202-I/MM
Manufacturer Part Number
DSPIC33FJ32MC202-I/MM
Description
IC DSPIC MCU/DSP 32K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
5.DSPIC33FJ32MC204-IPT.pdf
(304 pages)
Specifications of DSPIC33FJ32MC202-I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
Microchip
Quantity:
1 485
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC302-ISO PDF datasheet #4
- DSPIC33FJ32MC204-IPT PDF datasheet #5
- Current page: 213 of 304
- Download datasheet (3Mb)
TABLE 21-2:
2009 Microchip Technology Inc.
WDTPOST<3:0>
POSCMD<1:0>
FNOSC<2:0>
FCKSM<1:0>
OSCIOFNC
IOL1WAY
WDTPRE
FWDTEN
PWMPIN
Bit Field
WINDIS
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
dsPIC33F CONFIGURATION BITS DESCRIPTION (CONTINUED)
FOSCSEL
Register
FOSC
FOSC
FOSC
FWDT
FWDT
FWDT
FWDT
FOSC
FPOR
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator with postscaler
110 = Internal Fast RC (FRC) oscillator with divide-by-16
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = FRC oscillator
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral pin select configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1
Motor Control PWM Module Pin Mode bit
1 = PWM module pins controlled by PORT register at device Reset
0 = PWM module pins controlled by PWM module at device Reset
.
.
.
Clearing the SWDTEN bit in the RCON register will have no effect.)
disabled by clearing the SWDTEN bit in the RCON register)
(tri-stated)
(configured as output pins)
Preliminary
Description
DS70283G-page 213
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