PIC18F6310-I/PT Microchip Technology, PIC18F6310-I/PT Datasheet - Page 9

IC PIC MCU FLASH 4KX16 64TQFP

PIC18F6310-I/PT

Manufacturer Part Number
PIC18F6310-I/PT
Description
IC PIC MCU FLASH 4KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F6310-I/PT

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/EUSART/AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F6310-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
24. Module: MSSP
25. Module: MSSP
© 2007 Microchip Technology Inc.
Setting the SEN bit initiates a Start sequence on the
bus, after which, the SEN bit is cleared automati-
cally by hardware. If the SEN bit is set again (with-
out an address byte being transmitted), a Start
sequence will not commence and the SEN bit will
not be cleared. This condition causes the bus to
remain in an active state. The system is Idle when
ACKEN, RCEN, PEN, RSEN and SEN are clear.
Work around
Set the PEN or RSEN bit to transmit a Stop or
Repeated Start sequence, although the SEN bit
may still be set, indicating the bus is active. After
the sequence has completed, the PEN, RSEN and
SEN bit will be clear, indicating the bus is Idle.
Clearing and setting the SSPEN bit will also reset
the I
SEN status bits.
Date Codes that pertain to this issue:
All engineering and production devices.
In SPI mode, the Buffer Full flag (BF bit in the
SSPSTAT register), the Write Collision Detect bit
(WCOL bit in SSPCON1) and the Receive
Overflow Indicator bit (SSPOV in SSPCON1) are
not reset upon disabling the SPI module (by
clearing the SSPEN bit in the SSPCON1 register).
For example, if SSPBUF is full (BF bit is set) and
the MSSP module is disabled and re-enabled, the
BF bit will remain set. In SPI Slave mode, a sub-
sequent write to SSPBUF will result in a write
collision. Also, if a new byte is received, a receive
overflow will occur.
Work around
Ensure that if the buffer is full, SSPBUF is read
(thus clearing the BF flag) and WCOL is clear
before disabling the MSSP module. If the module
is configured in SPI Slave mode, ensure that the
SSPOV bit is clear before disabling the module.
Date Codes that pertain to this issue:
All engineering and production devices.
2
C peripheral and clear the PEN, RSEN and
PIC18F6310/6410/8310/8410
26. Module: MSSP (SPI Mode)
FIGURE 1:
EXAMPLE 4:
LOOP BTFSS
When the SPI is using Timer2/2 as the clock
source, a shorter than expected SCK pulse may
occur on the first bit of the transmitted/received
data (Figure 1).
Work around
To avoid producing the short pulse, turn off Timer2
and clear the TMR2 register, load the SSPBUF
with the data to transmit and then turn Timer2 back
on. Refer to Example 4 for sample code.
Date Codes that pertain to this issue:
All engineering and production devices.
SDO
SCK
BRA
MOVF
MOVWF
MOVF
BCF
CLRF
MOVWF
BSF
Write SSPBUF
SSPSTAT, BF
LOOP
SSPBUF, W
RXDATA
TXDATA, W
T2CON, TMR2ON ;Timer2 off
TMR2
SSPBUF
T2CON, TMR2ON ;Timer2 on
bit 0 = 1 bit 1 = 0
SCK PULSE VARIATION
USING TIMER2/2
AVOIDING THE INITIAL
SHORT SCK PULSE
;Data received?
;(Xmit complete?)
;No
;W = SSPBUF
;Save in user RAM
;W = TXDATA
;Clear Timer2
;Xmit New data
bit 2 = 1 . . . .
DS80206F-page 9

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