PIC24HJ32GP204-I/ML Microchip Technology, PIC24HJ32GP204-I/ML Datasheet - Page 177

IC PIC MCU FLASH 32K 44QFN

PIC24HJ32GP204-I/ML

Manufacturer Part Number
PIC24HJ32GP204-I/ML
Description
IC PIC MCU FLASH 32K 44QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP204-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
44-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
A/d Bit Size
12 bit
A/d Channels Available
13
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
3.6 V, 3.9 V
Supply Voltage (min)
2.7 V, 3 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 18-2:
© 2007 Microchip Technology Inc.
WDTPOST<3:0>
POSCMD<1:0>
FPWRT<2:0>
FCKSM<1:0>
OSCIOFNC
IOL1WAY
WDTPRE
FWDTEN
Bit Field
WINDIS
ALTI2C
PIC24HJ32GP202/204 and PIC24HJ16GP304
PIC24HJ32GP202/204 AND PIC24HJ16GP304 CONFIGURATION BITS DESCRIPTION
(CONTINUED)
Register
FOSC
FOSC
FWDT
FWDT
FWDT
FWDT
FPOR
FPOR
FOSC
FOSC
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral Pin Select Configuration
1 = Allow only one re-configuration
0 = Allow multiple re-configurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1
Alternate I
1 = I
0 = I
Power-on Reset Timer Value Select bits
111 = PWRT = 128 ms
110 = PWRT = 64 ms
101 = PWRT = 32 ms
100 = PWRT = 16 ms
011 = PWRT = 8 ms
010 = PWRT = 4 ms
001 = PWRT = 2 ms
000 = PWRT = Disabled
.
.
.
Clearing the SWDTEN bit in the RCON register will have no effect.)
disabled by clearing the SWDTEN bit in the RCON register)
2
2
C mapped to SDA1/SCL1 pins
C mapped to ASDA1/ASCL1 pins
Preliminary
2
C pins
Description
DS70289A-page 175

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