PIC18F67J11-I/PT Microchip Technology, PIC18F67J11-I/PT Datasheet - Page 438
![IC PIC MCU FLASH 64KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J11-I/PT
Manufacturer Part Number
PIC18F67J11-I/PT
Description
IC PIC MCU FLASH 64KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F66J11-IPT.pdf
(4 pages)
6.PIC18F66J11-IPT.pdf
(4 pages)
7.PIC18F66J11-IPT.pdf
(20 pages)
Specifications of PIC18F67J11-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F67J11-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
PIC18F87J11 FAMILY
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 352
H
Hardware Multiplier .......................................................... 111
I
I/O Ports ........................................................................... 129
I
INCF ................................................................................. 352
INCFSZ ............................................................................ 353
In-Circuit Debugger .......................................................... 329
DS39778D-page 438
2
C Mode (MSSP)
Table Pointer Boundaries .......................................... 92
Table Reads and Table Writes .................................. 89
Write Sequence ......................................................... 95
Write Sequence (Word Programming) ....................... 97
Writing ........................................................................ 95
8 x 8 Multiplication Algorithms ................................. 111
Operation ................................................................. 111
Performance Comparison (table) ............................. 111
Input Pull-up Configuration ...................................... 130
Open-Drain Outputs ................................................. 130
Pin Capabilities ........................................................ 129
Acknowledge Sequence Timing ............................... 262
Associated Registers ............................................... 270
Baud Rate Generator ............................................... 255
Bus Collision
Clock Arbitration ....................................................... 256
Clock Stretching ....................................................... 248
Clock Synchronization and the CKP bit ................... 249
Effects of a Reset ..................................................... 263
General Call Address Support ................................. 252
I
Master Mode ............................................................ 253
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode ................................................... 263
Operation ................................................................. 238
Read/Write Bit Information (R/W Bit) ............... 238, 241
Registers .................................................................. 233
Serial Clock (RC3/SCKx/SCLx) ............................... 241
Slave Mode .............................................................. 238
Sleep Operation ....................................................... 263
Stop Condition Timing .............................................. 262
2
C Clock Rate w/BRG ............................................. 255
Boundaries Based on Operation ........................ 92
Unexpected Termination .................................... 98
Write Verify ........................................................ 98
During a Repeated Start Condition .................. 267
During a Stop Condition ................................... 269
10-Bit Slave Receive Mode (SEN = 1) ............. 248
10-Bit Slave Transmit Mode ............................. 248
7-Bit Slave Receive Mode (SEN = 1) ............... 248
7-Bit Slave Transmit Mode ............................... 248
Operation ......................................................... 254
Reception ......................................................... 259
Repeated Start Condition Timing ..................... 258
Start Condition Timing ..................................... 257
Transmission .................................................... 259
tion ................................................................... 263
Address Masking Modes
Addressing ....................................................... 238
Reception ......................................................... 241
Transmission .................................................... 241
5-Bit ......................................................... 239
7-Bit ......................................................... 240
In-Circuit Serial Programming (ICSP) ...................... 315, 329
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 378
Indirect Addressing ............................................................ 84
INFSNZ ............................................................................ 353
Initialization Conditions for all Registers ...................... 57–62
Instruction Cycle ................................................................ 70
Instruction Set .................................................................. 331
and Standard PIC18 Instructions ............................. 378
Clocking Scheme ....................................................... 70
Flow/Pipelining ........................................................... 70
ADDLW .................................................................... 337
ADDWF .................................................................... 337
ADDWF (Indexed Literal Offset Mode) .................... 379
ADDWFC ................................................................. 338
ANDLW .................................................................... 338
ANDWF .................................................................... 339
BC ............................................................................ 339
BCF ......................................................................... 340
BN ............................................................................ 340
BNC ......................................................................... 341
BNN ......................................................................... 341
BNOV ...................................................................... 342
BNZ ......................................................................... 342
BOV ......................................................................... 345
BRA ......................................................................... 343
BSF .......................................................................... 343
BSF (Indexed Literal Offset Mode) .......................... 379
BTFSC ..................................................................... 344
BTFSS ..................................................................... 344
BTG ......................................................................... 345
BZ ............................................................................ 346
CALL ........................................................................ 346
CLRF ....................................................................... 347
CLRWDT ................................................................. 347
COMF ...................................................................... 348
CPFSEQ .................................................................. 348
CPFSGT .................................................................. 349
CPFSLT ................................................................... 349
DAW ........................................................................ 350
DCFSNZ .................................................................. 351
DECF ....................................................................... 350
DECFSZ .................................................................. 351
Extended Instructions .............................................. 373
General Format ........................................................ 333
GOTO ...................................................................... 352
INCF ........................................................................ 352
INCFSZ .................................................................... 353
INFSNZ .................................................................... 353
IORLW ..................................................................... 354
IORWF ..................................................................... 354
LFSR ....................................................................... 355
MOVF ...................................................................... 355
MOVFF .................................................................... 356
MOVLB .................................................................... 356
MOVLW ................................................................... 357
MOVWF ................................................................... 357
MULLW .................................................................... 358
MULWF .................................................................... 358
NEGF ....................................................................... 359
NOP ......................................................................... 359
Opcode Field Descriptions ....................................... 332
Considerations when Enabling ........................ 378
Syntax .............................................................. 373
Use with MPLAB IDE Tools ............................. 380
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