PIC18F2450-I/ML Microchip Technology, PIC18F2450-I/ML Datasheet - Page 25

IC PIC MCU FLASH 8KX16 28QFN

PIC18F2450-I/ML

Manufacturer Part Number
PIC18F2450-I/ML
Description
IC PIC MCU FLASH 8KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2450-I/ML

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Core Processor
PIC
Speed
48MHz
Connectivity
UART/USART, USB
Number Of I /o
23
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
23
Ram Memory Size
768Byte
Cpu Speed
48MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Height
0.88 mm
Length
6 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
6 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2450-I/ML
Manufacturer:
TOSHIBA
Quantity:
2 000
4.2
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Memory reads occur a single byte
at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 4.1 “Read Code Memory, ID Locations and
Configuration Bits”
reading code memory.
FIGURE 4-2:
 2010 Microchip Technology Inc.
Verify Code Memory and ID
Locations
No
with Post-Increment
with Post-Increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
code memory
verified?
Data?
Start
Does
VERIFY CODE MEMORY FLOW
for implementation details of
All
Yes
Yes
No
Failure,
Report
Error
PIC18F2XXX/4XXX FAMILY
Increment
Pointer
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the code
memory has been verified. The post-increment feature
of the Table Read 4-bit command may not be used to
increment the Table Pointer beyond the code memory
space. In a 64-Kbyte device, for example, a
post-increment read of address, FFFFh, will wrap the
Table Pointer back to 000000h, rather than point to the
unimplemented address, 010000h.
No
Set TBLPTR = 200000h
with Post-Increment
with Post-Increment
Read High Byte
Read Low Byte
Word = Expect
ID locations
verified?
Data?
Done
Does
All
Yes
Yes
No
DS39622L-page 25
Failure,
Report
Error

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