PIC18F2450-I/SP Microchip Technology, PIC18F2450-I/SP Datasheet - Page 147

IC PIC MCU FLASH 8KX16 28DIP

PIC18F2450-I/SP

Manufacturer Part Number
PIC18F2450-I/SP
Description
IC PIC MCU FLASH 8KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2450-I/SP

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163025 - PIC DEM FULL SPEED USB DEMO BRD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
14.5.1.1
The ACTVIF bit cannot be cleared immediately after
the USB module wakes up from Suspend or while the
USB module is suspended. A few clock cycles are
required to synchronize the internal hardware state
machine before the ACTVIF bit can be cleared by
firmware. Clearing the ACTVIF bit before the internal
hardware is synchronized may not have an effect on
the value of ACTVIF. Additionally, if the USB module
uses the clock from the 96 MHz PLL source, then after
clearing the SUSPND bit, the USB module may not be
immediately operational while waiting for the 96 MHz
PLL to lock. The application code should clear the
ACTVIF bit as shown in Example 14-1.
Only one ACTVIF interrupt is generated when resum-
ing from the USB bus Idle condition. If user firmware
clears the ACTVIF bit, the bit will not immediately
become set again, even when there is continuous bus
traffic. Bus traffic must cease long enough to generate
another IDLEIF condition before another ACTVIF
interrupt can be generated.
© 2008 Microchip Technology Inc.
Bus Activity Detect Interrupt Bit
(ACTVIF)
EXAMPLE 14-1:
Assembly:
LOOP:
DONE
C:
UCONbits.SUSPND = 0;
while (UIRbits.ACTVIF){UIRbits.ACTVIF = 0};
PIC18F2450/4450
BCF
BTFSS
BRA
BCF
BRA
UCON, SUSPND
UIR, ACTVIF
DONE
UIR, ACTVIF
LOOP
CLEARING ACTVIF BIT
(UIR<2>)
DS39760D-page 145

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