PIC18F66J16-I/PT Microchip Technology, PIC18F66J16-I/PT Datasheet - Page 410

• Manufacturer Part Number: PIC18F66J16-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J16-I/PT

• Core Size: 8-Bit
• Program Memory Size: 96KB (48K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J11 FAMILY
FIGURE 27-10:
TABLE 27-16: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
DS39778D-page 410
PM1
PM2
PM3
PM5
PM6
PM7
Param.
No
PMA<18:13>
Operating Conditions: 2.0V < V
PMCS<2:1>
PMD<7:0>
PMALL/
PMALH
System
PMWR
PMRD
Clock
Symbol
Q1
PMALL/PMALH Pulse Width
Address out valid to PMALL/PMALH Invalid
(address setup time)
PMALL/PMALH Invalid to Address Out
Invalid (address hold time)
PMRD Pulse Width
PMRD or PMENB Active to Data In Valid
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
(data hold time)
PARALLEL MASTER PORT READ TIMING DIAGRAM
PM2
Address<7:0>
Q2
CC
< 3.6V, -40°C < T
PM1
Characteristics
Q3
Address
PM3
A
Q4
< +85°C unless otherwise stated.
Q1
PM6
Q2
Min
—
—
—
—
—
—
Q3
PM5
0.75 T
0.25 T
PM7
0.5 T
0.5 T
Data
Typ
—
—
© 2009 Microchip Technology Inc.
Q4
CY
CY
CY
CY
Q1
Max
—
—
—
—
—
—
Q2
Units
ns
ns
ns
ns
ns
ns