PIC16F87-I/SS Microchip Technology, PIC16F87-I/SS Datasheet - Page 46
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PIC16F87-I/SS
Manufacturer Part Number
PIC16F87-I/SS
Description
IC MCU FLASH 4KX14 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F87-IP.pdf
(228 pages)
5.PIC16F87-IP.pdf
(8 pages)
6.PIC16F87-IP.pdf
(4 pages)
7.PIC16F87-IP.pdf
(8 pages)
8.PIC16F87-IP.pdf
(24 pages)
9.PIC16F88-ISO.pdf
(214 pages)
Specifications of PIC16F87-I/SS
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F87-I/SS
Manufacturer:
SEMELAB
Quantity:
77
PIC16F87/88
4.7.2
The core and peripherals can be configured to be
clocked by T1OSC using a 32.768 kHz crystal. The
crystal must be connected to the T1OSO and T1OSI
pins. This is the same configuration as the low-power
timer circuit (see Section 7.6 “Timer1 Oscillator”).
When SCS bits are configured to run from T1OSC, a
clock transition is generated. It will clear the OSTS bit,
switch the system clock from either the primary system
clock or INTRC, depending on the value of SCS<1:0>
and FOSC<2:0>, to the external low-power Timer1
oscillator input (T1OSC) and shut down the primary
system clock to conserve power.
After a clock switch has been executed, the internal Q
clocks are held in the Q1 state until eight falling edge
clocks are counted on the T1OSC. After the eight
clock periods have transpired, the clock input to the Q
clocks is released and operation resumes (see
Figure 4-8). In addition, T1RUN (In T1CON) is set to
indicate that T1OSC is being used as the system
clock.
FIGURE 4-8:
DS30487C-page 44
Note 1: T
SCS<1:0>
Program
Counter
System
T1OSI
OSC1
Clock
2: T
3: T
4: T
Q1
SEC_RUN MODE
OSC
SCS
T
DLY
1
T
OSC
P
Q2
= 8 T
= 1 T
= 30.52 s.
= 50 ns minimum.
PC
(2)
Q3
T
T
Q4
1
1
P
P
TIMING DIAGRAM FOR SWITCHING TO SEC_RUN MODE
.
T
Q1
DLY (4)
T
T
1
P
(1)
T
SCS
(3)
PC +1
Note 1: The T1OSCEN bit must be enabled and it
Q1
2: When T1OSCEN = 0, the following possible
Q2
A clock switching event will occur if the
final state of the SCS bits is different from
the original.
is the user’s responsibility to ensure
T1OSC is stable before clock switching to
the T1OSC input clock can occur.
effects result.
SCS<1:0>
Original
Q3
00
00
10
10
Q4
2005 Microchip Technology Inc.
SCS<1:0>
Modified
Q1
01
11
11
01
Q2
PC + 2
00 – no change
10 – INTRC
10 – no change
00 – Oscillator
defined by
FOSC<2:0>
Q3
SCS<1:0>
Final
Q4
PC + 3
Q1