PIC18F4221-I/P Microchip Technology, PIC18F4221-I/P Datasheet - Page 371

• Manufacturer Part Number: PIC18F4221-I/P
• Description: IC PIC MCU FLASH 2KX16 400IP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4221-I/P

• Program Memory Type: FLASH
• Program Memory Size: 4KB (2K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 27-23:
TABLE 27-25: A/D CONVERSION REQUIREMENTS
© 2009 Microchip Technology Inc.
130
131
132
135
137
Note 1:
Param
No.
A/D CLK
2:
3:
4:
A/D DATA
Note 1:
SAMPLE
T
T
T
T
T
ADRES
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
SWC
DIS
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
GO
2:
Q4
(1)
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert → Sample
Discharge Time
132
A/D CONVERSION TIMING
PIC18F2221/2321/4221/4321 FAMILY
(Note 2)
Characteristic
DD
(3)
9
to V
SS
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
8
or V
OLD_DATA
SS
(2)
7
to V
. . .
SAMPLING STOPPED
DD
CY
). The source impedance (R
CY
is added before the A/D clock starts.
cycle.
. . .
131
130
Min
0.7
1.4
1.4
0.2
—
—
11
—
2
(Note 4)
25.0
25.0
Max
12
—
—
1
3
(1)
(1)
1
Units
T
μs
μs
μs
μs
μs
μs
AD
S
) on the input channels is 50Ω.
0
T
V
T
A/D RC mode
V
-40°C to +85°C
OSC
OSC
DD
DD
AD
= 2.0V;
= 2.0V; A/D RC mode
based, V
based, V
clock divider.
NEW_DATA
DONE
Conditions
DS39689F-page 371
T
CY
REF
REF
≥ 3.0V
full range