ATMEGA8515L-8PU Atmel, ATMEGA8515L-8PU Datasheet - Page 56

IC AVR MCU 8K 8MHZ 3V 40DIP

ATMEGA8515L-8PU

Manufacturer Part Number
ATMEGA8515L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA8515L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
512Byte
# I/os (max)
35
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP W
Controller Family/series
AVR MEGA
No. Of I/o's
35
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Price
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56
ATmega8515(L)
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 2K bytes and
the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed and the Boot section size set to 2K bytes, the
most typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the
IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical
and general program setup for the Reset and Interrupt Vector Addresses is:
Address Labels
$000
$001
$002
$003
$004
$005
;
.org $C02
$C02
$C04
...
$C2A
Handler
Address Labels
.org $002
$001
$002
...
$010
Handler
;
.org $C00
$C00
$C01
$C02
$C03
$C04
$C05
Address Labels
.org $C00
$C00
$C01
$C02
...
$C10
Handler
;
$C11
RESET:
....
....
RESET:
....
RESET:
Code
ldi
out
ldi
out
sei
<instr>
rjmp EXT_INT0
rjmp EXT_INT1
..
rjmp SPM_RDY
Code
rjmp EXT_INT0
rjmp EXT_INT1
..
rjmp SPM_RDY
ldi
out
ldi
out
sei
<instr>
Code
rjmp RESET
rjmp EXT_INT0
rjmp EXT_INT1
..
rjmp SPM_RDY
ldi
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
r16,high(RAMEND); Main program start
xxx
xxx
; Set Stack Pointer to top of RAM
; Enable interrupts
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program memory Ready
Comments
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program memory Ready
; Set Stack Pointer to top of RAM
; Enable interrupts
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program memory Ready
Comments
Comments
2512K–AVR–01/10

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