PIC18F26J11-I/SS Microchip Technology, PIC18F26J11-I/SS Datasheet - Page 367

• Manufacturer Part Number: PIC18F26J11-I/SS
• Description: IC PIC MCU FLASH 64K 2V 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26J11-I/SS

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Interface: EUSART, I2C, SPI
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180023, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23.0
PIC18F46J11 family devices (including PIC18LF46J11
family devices) have a High/Low Voltage Detect
(HLVD) module for monitoring the absolute voltage on
V
that allows the user to specify both a device voltage trip
point and the direction of change from that point.
If the module detects an excursion past the trip point in
that direction, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the inter-
rupt vector address and the software can then respond
to the interrupt.
REGISTER 23-1:
The module is enabled by setting the HLVDEN bit.
Each time the module is enabled, the circuitry requires
some time to stabilize. The IRVST bit is a read-only bit
that indicates when the circuit is stable. The module
can generate an interrupt only after the circuit is stable
and IRVST is set.
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
DD
VDIRMAG
or the HLVDIN pin. This is a programmable circuit
R/W-0
HIGH/LOW VOLTAGE DETECT
(HLVD)
See Table 28-7 in Section 28.0 “Electrical Characteristics” for specifications.
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
BGVST: Band Gap Reference Voltages Stable Status Flag bit
1 = Indicates internal band gap voltage references is stable
0 = Indicates internal band gap voltage reference is not stable
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
BGVST
range and the HLVD interrupt should not be enabled
R-0
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER (ACCESS F85h)
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
HLVDEN
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HLVDL3
PIC18F46J11 FAMILY
R/W-0
The
(Register 23-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
Figure 23-1 provides a block diagram for the HLVD
module.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in V
point. When the bit is set, the module monitors for rises
in V
DD
(1)
High/Low-Voltage
above the set point.
HLVDL2
R/W-0
(1)
DD
x = Bit is unknown
below a predetermined set
Detect
HLVDL1
R/W-0
DS39932C-page 367
(1)
Control
HLVDL0
R/W-0
register
bit 0
(1)