PIC18LF24J50-I/ML Microchip Technology, PIC18LF24J50-I/ML Datasheet - Page 542
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PIC18LF24J50-I/ML
Manufacturer Part Number
PIC18LF24J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF24J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, MA180024, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F46J50 FAMILY
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 452
H
Hardware Multiplier .......................................................... 107
High/Low-Voltage Detect ................................................. 391
I
I/O Ports ........................................................................... 125
I
I
DS39931C-page 542
2
2
C Mode .......................................................................... 282
C Mode (MSSP)
Table Pointer Boundaries ........................................ 100
Table Reads and Table Writes .................................. 97
Write Sequence ....................................................... 103
Writing ...................................................................... 103
8 x 8 Multiplication Algorithms ................................. 107
Operation ................................................................. 107
Performance Comparison (table) ............................. 107
Applications .............................................................. 395
Associated Registers ............................................... 396
Characteristics ......................................................... 503
Current Consumption ............................................... 393
Effects of a Reset ..................................................... 396
Operation ................................................................. 392
Setup ........................................................................ 393
Start-up Time ........................................................... 393
Typical Application ................................................... 395
Open-Drain Outputs ................................................. 126
Pin Capabilities ........................................................ 125
TTL Input Buffer Option ........................................... 126
Acknowledge Sequence Timing ............................... 310
Associated Registers ............................................... 316
Baud Rate Generator ............................................... 303
Bus Collision
Clock Arbitration ....................................................... 305
Clock Stretching ....................................................... 297
Clock Synchronization and CKP bit ......................... 298
Effects of a Reset ..................................................... 311
General Call Address Support ................................. 301
I
Master Mode ............................................................ 301
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode ................................................... 311
Operation ................................................................. 287
Read/Write Bit Information (R/W Bit) ............... 287, 290
Registers .................................................................. 282
Serial Clock (SCLx Pin) ........................................... 290
Slave Mode .............................................................. 287
2
C Clock Rate w/BRG ............................................. 304
Unexpected Termination .................................. 106
Write Verify ...................................................... 106
During Sleep .................................................... 396
During a Repeated Start Condition .................. 314
During a Stop Condition ................................... 315
10-Bit Slave Receive Mode (SEN = 1) ............. 297
10-Bit Slave Transmit Mode ............................. 297
7-Bit Slave Receive Mode (SEN = 1) ............... 297
7-Bit Slave Transmit Mode ............................... 297
Operation ......................................................... 303
Reception ......................................................... 307
Repeated Start Condition Timing ..................... 306
Start Condition Timing ..................................... 305
Transmission .................................................... 307
tion ................................................................... 311
Addressing ....................................................... 287
INCF ................................................................................ 452
INCFSZ ............................................................................ 453
In-Circuit Debugger .......................................................... 430
In-Circuit Serial Programming (ICSP) ...................... 413, 430
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 478
Indirect Addressing ............................................................ 92
INFSNZ ............................................................................ 453
Initialization Conditions for All Registers ??–...................... 70
Instruction Cycle ................................................................ 76
Instruction Set .................................................................. 431
Sleep Operation ....................................................... 311
Stop Condition Timing ............................................. 310
and Standard PIC18 Instructions ............................. 478
Clocking Scheme ....................................................... 76
Flow/Pipelining ........................................................... 76
ADDLW .................................................................... 437
ADDWF .................................................................... 437
ADDWF (Indexed Literal Offset Mode) .................... 479
ADDWFC ................................................................. 438
ANDLW .................................................................... 438
ANDWF .................................................................... 439
BC ............................................................................ 439
BCF ......................................................................... 440
BN ............................................................................ 440
BNC ......................................................................... 441
BNN ......................................................................... 441
BNOV ...................................................................... 442
BNZ ......................................................................... 442
BOV ......................................................................... 445
BRA ......................................................................... 443
BSF .......................................................................... 443
BSF (Indexed Literal Offset Mode) .......................... 479
BTFSC ..................................................................... 444
BTFSS ..................................................................... 444
BTG ......................................................................... 445
BZ ............................................................................ 446
CALL ........................................................................ 446
CLRF ....................................................................... 447
CLRWDT ................................................................. 447
COMF ...................................................................... 448
CPFSEQ .................................................................. 448
CPFSGT .................................................................. 449
CPFSLT ................................................................... 449
DAW ........................................................................ 450
DCFSNZ .................................................................. 451
DECF ....................................................................... 450
DECFSZ .................................................................. 451
Extended Instructions .............................................. 473
General Format ........................................................ 433
GOTO ...................................................................... 452
INCF ........................................................................ 452
INCFSZ .................................................................... 453
INFSNZ .................................................................... 453
IORLW ..................................................................... 454
IORWF ..................................................................... 454
LFSR ....................................................................... 455
Addressing Masking Modes
Reception ........................................................ 290
Transmission ................................................... 290
Considerations when Enabling ........................ 478
Syntax .............................................................. 473
Use with MPLAB IDE Tools ............................. 480
5-Bit ......................................................... 288
7-Bit ......................................................... 289
© 2009 Microchip Technology Inc.
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