PIC18F26K20-E/SP Microchip Technology, PIC18F26K20-E/SP Datasheet - Page 129
![IC PIC MCU FLASH 32KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F26K20-E/SP
Manufacturer Part Number
PIC18F26K20-E/SP
Description
IC PIC MCU FLASH 32KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F26K20-ISS.pdf
(6 pages)
4.PIC18F26K20-ISS.pdf
(10 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F26K20-E/SP
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F26K20-ISS PDF datasheet #3
- PIC18F26K20-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 129 of 456
- Download datasheet (4Mb)
TABLE 10-6:
2010 Microchip Technology Inc.
PORTC
LATC
TRISC
T1CON
T3CON
TXSTA
RCSTA
SSPCON1
CCP1CON
CCP2CON
ECCP1AS
SLRCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTC.
Note 1:
Name
Not implemented on PIC18F2XK20 devices.
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1
PORTC Data Latch Register (Read and Write to Data Latch)
PORTC Data Direction Control Register
WCOL
CSRC
SPEN
RD16
RD16
P1M1
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Bit 7
RC7
—
—
T3CCP2 T3CKPS1 T3CKPS0 T3CCP1
T1RUN
SSPOV
P1M0
Bit 6
RC6
TX9
RX9
—
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
SSPEN
DC1B1
DC2B1
SREN
TXEN
Bit 5
RC5
—
SLRE
DC1B0
DC2B0
SYNC
CREN
Bit 4
CKP
RC4
(1)
CCP1M3 CCP1M2 CCP1M1 CCP1M0
CCP2M3 CCP2M2 CCP2M1 CCP2M0
SLRD
ADDEN
SENDB
SSPM3
PIC18F2XK20/4XK20
Bit 3
RC3
(1)
T3SYNC TMR3CS TMR3ON
PSSAC0
SSPM2
BRGH
FERR
SLRC
Bit 2
RC2
PSSBD1
SSPM1
OERR
TRMT
SLRB
Bit 1
RC1
PSSBD0
SSPM0
TX9D
RX9D
SLRA
Bit 0
RC0
DS41303G-page 129
on page
Values
Reset
62
62
62
60
61
61
61
60
61
61
61
63
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