DSPIC33FJ06GS101-I/SO Microchip Technology, DSPIC33FJ06GS101-I/SO Datasheet - Page 271
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DSPIC33FJ06GS101-I/SO
Manufacturer Part Number
DSPIC33FJ06GS101-I/SO
Description
IC DSPIC MCU/DSP 6K 18-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ06GS101-I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
6KB (6K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
13
Flash Memory Size
6KB
Supply Voltage Range
3V To 3.6V
Package
18SOIC W
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
13
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 271 of 346
- Download datasheet (6Mb)
21.8
The
dsPIC33FJ16GSX02/X04 devices offer the intermediate
implementation of CodeGuard™ Security. CodeGuard
Security enables multiple parties to securely share
resources (memory, interrupts and peripherals) on a
single chip. This feature helps protect individual
Intellectual Property in collaborative system designs.
When coupled with software encryption libraries, Code-
Guard™ Security can be used to securely update Flash
even when multiple IPs reside on a single chip.
TABLE 21-3:
© 2009 Microchip Technology Inc.
Configuration Bits
BSS<2:0> = x11
BSS<2:0> = x10
BSS<2:0> = x01
BSS<2:0> = x00
1792
256
768
0K
Code Protection and
CodeGuard™ Security
dsPIC33FJ06GS101/X02
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
CODE FLASH SECURITY
SEGMENT SIZES FOR
6-Kbyte DEVICES
GS = 1536 IW
GS = 1024 IW
GS = 1792 IW
BS = 1792 IW
VS = 256 IW
VS = 256 IW
BS = 256 IW
VS = 256 IW
BS = 768 IW
VS = 256 IW
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
and
Preliminary
The code protection features are controlled by the
Configuration registers: FBS and FGS.
Secure segment and RAM protection is not implemented
in
dsPIC33FJ16GSX02/X04 devices.
TABLE 21-4:
Configuration Bits
Note:
BSS<2:0> = x11
BSS<2:0> = x10
BSS<2:0> = x01
BSS<2:0> = x00
1792
256
768
0K
Refer to CodeGuard Security Reference
Manual (DS70180) for further information
on usage, configuration and operation of
CodeGuard Security.
dsPIC33FJ06GS101/X02
CODE FLASH SECURITY
SEGMENT SIZES FOR
16-Kbyte DEVICES
GS = 5376 IW
GS = 5120 IW
GS = 4608 IW
GS = 3584 IW
BS = 1792 IW
VS = 256 IW
VS = 256 IW
BS = 256 IW
VS = 256 IW
BS = 768 IW
VS = 256 IW
DS70318D-page 269
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
000800h
000FFEh
001000h
002BFEh
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