PIC16C554-04/SO Microchip Technology, PIC16C554-04/SO Datasheet - Page 62
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PIC16C554-04/SO
Manufacturer Part Number
PIC16C554-04/SO
Description
IC MCU OTP 512X14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C554-04/SO
Core Size
8-Bit
Program Memory Size
896B (512 x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
80Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic
RoHS Compliant
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
80 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Other names
PIC16C554-04/SOR
PIC16C554-04/SOR
PIC16C554-04/SOR
PIC16C55X
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DS40143D-page 60
INCFSZ
IORLW
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (dest), skip if result = 0
None
The contents of register 'f' are
incremented. If 'd' is 0 the result is
placed in the W register. If 'd' is 1 the
result is placed back in register 'f'.
If the result is 0, the next instruction,
which is already fetched, is discarded.
A NOP is executed instead making it a
two-cycle instruction.
1
1(2)
Before Instruction
[ label ]
0 ≤ k ≤ 255
(W) .OR. k → (W)
Z
The contents of the W register is
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
1
1
Before Instruction
After Instruction
Increment f, Skip if 0
00
HERE
CONTINUE •
Inclusive OR Literal with W
11
IORLW
PC
After Instruction
CNT
if CNT = 0,
PC
if CNT ≠ 0,
PC
W
W
Z
INCFSZ f,d
IORLW k
=
=
=
1111
= address HERE
= CNT + 1
= address CONTINUE
= address HERE +1
1000
0x35
INCFSZ
GOTO
•
•
0x9A
0xBF
1
dfff
kkkk
LOOP
CNT,
ffff
kkkk
Preliminary
1
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORWF
MOVLW
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .OR. (f) → (dest)
Z
Inclusive OR the W register with
register 'f'. If 'd' is 0 the result is placed
in the W register. If 'd' is 1 the result is
placed back in register 'f'.
1
1
Before Instruction
After Instruction
[ label ]
0 ≤ k ≤ 255
k → (W)
None
The eight bit literal 'k' is loaded into W
register. The don’t cares will assemble
as 0’s.
1
1
After Instruction
Inclusive OR W with f
00
IORWF
Move Literal to W
11
MOVLW
2002 Microchip Technology Inc.
RESULT = 0x13
W
RESULT = 0x13
W
Z
W
IORWF
MOVLW k
0100
00xx
0x5A
=
= 0x91
= 0x93
= 1
0x5A
dfff
RESULT, 0
kkkk
f,d
ffff
kkkk