PIC18LF14K50-I/P Microchip Technology, PIC18LF14K50-I/P Datasheet - Page 279
![IC PIC MCU FLASH 16KX10 20-PDIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18LF14K50-I/P
Manufacturer Part Number
PIC18LF14K50-I/P
Description
IC PIC MCU FLASH 16KX10 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18LF14K50-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/MSSP/SPI/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF14K50-I/P
Manufacturer:
Microchip
Quantity:
450
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F14K50-IP PDF datasheet #5
- Current page: 279 of 422
- Download datasheet (5Mb)
23.0
The PIC18F/LF1XK50 devices differentiate between
various kinds of Reset:
a)
b)
c)
d)
e)
f)
g)
h)
This section discusses Resets generated by MCLR,
POR and BOR and covers the operation of the various
start-up timers. Stack Reset events are covered in
Section 3.1.2.4 “Stack Full and Underflow Resets”.
WDT Resets are covered in Section 24.2 “Watchdog
Timer (WDT)”.
FIGURE 23-1:
2010 Microchip Technology Inc.
OSC1
MCLR
V
Note 1: See Table 23-2 for time-out situations.
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during power-managed modes
Watchdog Timer (WDT) Reset (during
execution)
Programmable Brown-out Reset (BOR)
RESET Instruction
Stack Full Reset
Stack Underflow Reset
DD
RESET
2: PWRT and OST counters are reset by POR and BOR. See Sections 23.3 and 23.4.
LFINTOSC
Instruction
RESET
OST/PWRT
Pointer
32 s
Stack
( )_IDLE
Brown-out
Time-out
V
Detect
Sleep
DD
WDT
Reset
Rise
OST
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
PWRT
Stack Full/Underflow Reset
External Reset
MCLRE
10-bit Ripple Counter
11-bit Ripple Counter
(2)
POR Pulse
BOREN
(2)
1024 Cycles
65.5 ms
Preliminary
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 23-1.
23.1
Device Reset events are tracked through the RCON
register (Register 23-1). The lower five bits of the reg-
ister indicate that a specific Reset event has occurred.
In most cases, these bits can only be cleared by the
event and must be set by the application after the
event. The state of these flag bits, taken together, can
be read to indicate the type of Reset that just occurred.
This is described in more detail in Section 23.6 “Reset
State of Registers”.
The RCON register also has control bits for setting
interrupt priority (IPEN) and software control of the
BOR (SBOREN). Interrupt priority is discussed in
Section 7.0
Section 23.4 “Brown-out Reset (BOR)”.
RCON Register
PIC18F/LF1XK50
“Interrupts”.
S
R
BOR
DS41350D-page 279
Q
is
Enable OST
Enable PWRT
Chip_Reset
covered
(1)
in
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