PIC18F25J11-I/SO Microchip Technology, PIC18F25J11-I/SO Datasheet - Page 28
![IC PIC MCU FLASH 32K 2V 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F25J11-I/SO
Manufacturer Part Number
PIC18F25J11-I/SO
Description
IC PIC MCU FLASH 32K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F25J11-I/SO
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC18F2XJXX/4XJXX FAMILY
Table 5-9 describes how to calculate the checksum for
each device.
TABLE 5-9:
DS39687E-page 28
PIC18F24J10
PIC18F44J10
PIC18F24J11
PIC18F44J11
PIC18F24J50
PIC18F44J50
PIC18F25J10
PIC18F45J10
PIC18F25J11
PIC18F45J11
PIC18F25J50
PIC18F45J50
PIC18F26J11
PIC18F46J11
PIC18F26J50
PIC18F46J50
PIC18F26J13
PIC18F46J13
PIC18F26J53
PIC18F46J53
PIC18F27J13
PIC18F47J13
PIC18F27J53
PIC18F47J53
Legend: [a] = Value at address a; SUM[a:b] = Sum of locations a to b inclusive; + = Addition; & = Bitwise AND.
Device
All addresses are hexadecimal.
CHECKSUM COMPUTATION
Protection
Code
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
SUM[000000:003FF7] + ([003FF8] & E1h) + ([003FF9] & 04h) + ([003FFA] & C7h) +
([003FFB] & 0Fh) + ([003FFD] & 01h)
0000h
SUM[000000:003FF7] + ([003FF8] & E1h) + ([003FF9] & FCh) + ([003FFA] & DFh) +
([003FFB] & FFh) + ([003FFC] & FFh) + ([003FFD] & F9h) + ([003FFE] & FFh) +
([003FFF] & F1h)
0000h
SUM[000000:003FF7] + ([003FF8] & EFh) + ([003FF9] & FFh) + ([003FFA] & DFh) +
([003FFB] & FFh) + ([003FFC] & FFh) + ([003FFD] & F9h) + ([003FFE] & FFh) +
([003FFF] & F1h)
0000h
SUM[000000:007FF7] + ([007FF8] & E1h) + ([007FF9] & 04h) + ([007FFA] & C7h) +
([007FFB] & 0Fh) + ([007FFD] & 01h)
0000h
SUM[000000:007FF7] + ([007FF8] & E1h) + ([007FF9] & FCh) + ([007FFA] & DFh) +
([007FFB] & FFh) + ([007FFC] & FFh) + ([007FFD] & F9h) + ([007FFE] & FFh) +
([007FFF] & F1h)
0000h
SUM[000000:007FF7] + ([007FF8] & EFh) + ([007FF9] & FFh) + ([007FFA] & DFh) +
([007FFB] & FFh) + ([007FFC] & FFh) + ([007FFD] & F9h) + ([007FFE] & FFh) +
([007FFF] & F1h)
0000h
SUM[000000:00FFF7] + ([00FFF8] & E1h) + ([00FFF9] & FCh) + ([00FFFA] & DFh) +
([00FFFB] & FFh) + ([00FFFC] & FFh) + ([00FFFD] & F9h) + ([00FFFE] & FFh) +
([00FFFF] & F1h)
0000h
SUM[000000:00FFF7] + ([00FFF8] & EFh) + ([00FFF9] & FFh) + ([00FFFA] & DFh) +
([00FFFB] & FFh) + ([00FFFC] & FFh) + ([00FFFD] & F9h) + ([00FFFE] & FFh) +
([00FFFF] & F1h)
0000h
SUM[000000:00FFF7] + ([00FFF8] & FFh) + ([00FFF9] & FCh) +([00FFFA] & FFh) +
([00FFFB] & FFh) + ([00FFFC] & FFh) + ([00FFFD] & FFh) + ([00FFFE] & BFh) +
([00FFFF] & F3h)
0000h
SUM[000000:00FFF7] + ([00FFF8] & FFh) + ([00FFF9] & FFh) +([00FFFA] & FFh) +
([00FFFB] & FFh) + ([00FFFC] & FFh) + ([00FFFD] & FBh) + ([00FFFE] & BFh) +
([00FFFF] & FBh)
0000h
SUM[000000:01FFF7] + ([01FFF8] & FFh) + ([01FFF9] & FCh) + ([01FFFA] & FFh) +
([01FFFB] & FFh) + ([01FFFC] & FFh) + ([01FFFD] & FFh) + ([01FFFE] & FFh) +
([01FFFF] & F3h)
0000h
SUM[000000:01FFF7] + ([01FFF8] & FFh) + ([01FFF9] & FFh) + ([01FFFA] & FFh) +
([01FFFB] & FFh) + ([01FFFC] & FFh) + ([01FFFD] & FBh) + ([01FFFE] & FFh) +
([01FFFF] & FBh)
0000h
Checksum
© 2009 Microchip Technology Inc.