PIC16LF627-04/SO Microchip Technology, PIC16LF627-04/SO Datasheet - Page 46
![IC MCU FLASH 1KX14 COMP 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LF627-04/SO
Manufacturer Part Number
PIC16LF627-04/SO
Description
IC MCU FLASH 1KX14 COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16LF627-04/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (5Mb)
PIC16F62X
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. A prescaler assignment for the Timer0 module
means that there is no postscaler for the Watchdog
Timer, and vice-versa.
FIGURE 6-1:
DS40300C-page 44
WDT Enable bit
T0CKI
Watchdog
Pin
Note 1: T0SE, T0CS, PSA, PS0-PS2 are bits in the Option Register.
Timer
Timer0 Prescaler
F
OSC
/4
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT
0
1
PSA
.
T0CS
0
1
WDT Postscaler/
TMR0 Prescaler
0
Timeout
WDT
Preliminary
8-to-1MUX
8
1
1
0
PSA
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing
MOVWF 1, BSF 1, x....etc.) will clear the pres-
caler. When assigned to WDT, a CLRWDT instruction
will clear the prescaler along with the Watchdog Timer.
The prescaler is not readable or writable.
PSA
to
PS0 - PS2
Cycles
SYNC
2
the
TMR0
2003 Microchip Technology Inc.
TMR0 reg
register
Data Bus
8
Set Flag Bit T0IF
(e.g.,
on Overflow
CLRF 1,
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