PIC16LF1939-I/ML Microchip Technology, PIC16LF1939-I/ML Datasheet - Page 271
![IC MCU 8BIT FLASH 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16LF1939-I/ML
Manufacturer Part Number
PIC16LF1939-I/ML
Description
IC MCU 8BIT FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1939-I/ML
Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF1939-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
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23.6.5
A Repeated Start condition occurs when the RSEN bit
of the SSPCON2 register is programmed high and the
Master state machine is no longer active. When the
RSEN bit is set, the SCL pin is asserted low. When the
SCL pin is sampled low, the Baud Rate Generator is
loaded and begins counting. The SDA pin is released
(brought high) for one Baud Rate Generator count
(T
SDA is sampled high, the SCL pin will be deasserted
(brought high). When SCL is sampled high, the Baud
Rate Generator is reloaded and begins counting. SDA
and SCL must be sampled high for one T
action is then followed by assertion of the SDA pin
(SDA = 0) for one T
asserted low. Following this, the RSEN bit of the
FIGURE 23-27:
2009 Microchip Technology Inc.
BRG
). When the Baud Rate Generator times out, if
I
START CONDITION TIMING
2
C MASTER MODE REPEATED
BRG
REPEAT START CONDITION WAVEFORM
SDA
SCL
while SCL is high. SCL is
Write to SSPCON2
occurs here
SDA = 1,
SCL (no change)
BRG
. This
Preliminary
T
BRG
SDA = 1,
SCL = 1
T
BRG
Repeated Start
SSPCON2 register will be automatically cleared and
the Baud Rate Generator will not be reloaded, leaving
the SDA pin held low. As soon as a Start condition is
detected on the SDA and SCL pins, the S bit of the
SSPSTAT register will be set. The SSPIF bit will not be
set until the Baud Rate Generator has timed out.
PIC16F193X/LF193X
Sr
Note 1: If RSEN is programmed while any other
T
BRG
2: A bus collision during the Repeated Start
S bit set by hardware
At completion of Start bit,
hardware clears RSEN bit
Write to SSPBUF occurs here
event is in progress, it will not take effect.
condition occurs if:
and sets SSPIF
• SDA is sampled low when SCL
• SCL goes low before SDA is
T
BRG
goes from low-to-high.
asserted low. This may indicate that
another master is attempting to
transmit a data ‘1’.
1st bit
T
BRG
DS41364D-page 271
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