PIC18F14K50-I/SO Microchip Technology, PIC18F14K50-I/SO Datasheet - Page 415

• Manufacturer Part Number: PIC18F14K50-I/SO
• Description: IC PIC MCU FLASH 8KX16 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

RESET ............................................................................. 341
Reset State of Registers .................................................. 286
Resets ...................................................................... 279, 293
RETFIE ............................................................................ 342
RETLW ............................................................................ 342
RETURN .......................................................................... 343
Return Address Stack ........................................................ 30
Return Stack Pointer (STKPTR) ........................................ 31
Revision History ............................................................... 407
RLCF ................................................................................ 343
RLNCF ............................................................................. 344
RRCF ............................................................................... 344
RRNCF ............................................................................ 345
S
SCK .................................................................................. 139
SDI ................................................................................... 139
SDO ................................................................................. 139
SEC_IDLE Mode .............................................................. 240
SEC_RUN Mode .............................................................. 238
Serial Clock, SCK ............................................................ 139
Serial Data In (SDI) .......................................................... 139
Serial Data Out (SDO) ..................................................... 139
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 345
Shoot-through Current ..................................................... 132
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 139
Slave Select Synchronization .......................................... 145
 2010 Microchip Technology Inc.
REFCON0 ................................................................ 249
REFCON1 ................................................................ 250
REFCON2 ................................................................ 250
SLRCON (PORT Slew Rate Control) ....................... 100
SRCON0 (SR Latch Control 0) ................................ 244
SRCON1 (SR Latch Control 1) ................................ 245
SSPADD (MSSP Address and Baud Rate,
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 141
SSPCON2 (MSSP Control 2, I
SSPMSK (SSP Mask) .............................................. 158
SSPSTAT (MSSP Status, SPI Mode) .............. 140, 149
STATUS ..................................................................... 45
STKPTR (Stack Pointer) ............................................ 31
T0CON (Timer0 Control) .......................................... 101
T1CON (Timer1 Control) .......................................... 105
T2CON (Timer2 Control) .......................................... 111
T3CON (Timer3 Control) .......................................... 113
TRISA (Tri-State PORTA) .......................................... 85
TRISB (Tri-State PORTB) .................................... 90, 94
TXSTA (Transmit Status and Control) ..................... 192
UCFG (USB Configuration) ...................................... 256
UCON (USB Control) ............................................... 254
UEIE (USB Error Interrupt Enable) .......................... 272
UEIR (USB Error Interrupt Status) ........................... 271
UEPn (USB Endpoint n Control) .............................. 259
UIE (USB Interrupt Enable) ...................................... 270
UIR (USB Interrupt Status) ...................................... 268
USTAT (USB Status) ............................................... 258
WDTCON (Watchdog Timer Control) ...................... 305
WPUA (Weak Pull-up PORTA) .................................. 86
WPUB (Weak Pull-up PORTB) .................................. 91
Brown-out Reset (BOR) ........................................... 293
Oscillator Start-up Timer (OST) ............................... 293
Power-on Reset (POR) ............................................ 293
Power-up Timer (PWRT) ......................................... 293
SPI Mode) ........................................................ 159
2
2
C Mode) ................. 150
C Mode) ................. 151
Preliminary
SLEEP ............................................................................. 346
Sleep Mode ..................................................................... 239
SLRCON Register ........................................................... 100
Software Simulator (MPLAB SIM) ................................... 363
SPBRG ............................................................................ 195
SPBRGH ......................................................................... 195
Special Event Trigger ...................................................... 215
Special Event Trigger. See Compare (ECCP Mode).
Special Features of the CPU ........................................... 293
Special Function Registers ................................................ 39
SPI Mode
SPI Mode (MSSP)
SR Latch .......................................................................... 243
SRCON0 Register ........................................................... 244
SRCON1 Register ........................................................... 245
SS .................................................................................... 139
SSP
SSPADD Register ............................................................ 159
SSPCON1 Register ................................................. 141, 150
SSPCON2 Register ......................................................... 151
SSPMSK Register ........................................................... 158
SSPOV ............................................................................ 171
SSPOV Status Flag ......................................................... 171
SSPSTAT Register .................................................. 140, 149
Stack Full/Underflow Resets .............................................. 32
Standard Instructions ....................................................... 311
STATUS Register .............................................................. 45
STKPTR Register .............................................................. 31
SUBFSR .......................................................................... 357
SUBFWB ......................................................................... 346
SUBLW ............................................................................ 347
SUBULNK ........................................................................ 357
SUBWF ............................................................................ 347
SUBWFB ......................................................................... 348
SWAPF ............................................................................ 348
T
T0CON Register .............................................................. 101
T1CON Register .............................................................. 105
T2CON Register .............................................................. 111
T3CON Register .............................................................. 113
Table Pointer Operations (table) ........................................ 54
Table Reads/Table Writes ................................................. 32
TBLRD ............................................................................. 349
TBLWT ............................................................................ 350
Thermal Considerations ................................................... 379
Map ............................................................................ 40
Typical Master/Slave Connection ............................ 143
Associated Registers ............................................... 147
Bus Mode Compatibility ........................................... 147
Effects of a Reset .................................................... 147
Enabling SPI I/O ...................................................... 143
Master Mode ............................................................ 144
Operation ................................................................. 142
Operation in Power Managed Modes ...................... 147
Serial Clock ............................................................. 139
Serial Data In ........................................................... 139
Serial Data Out ........................................................ 139
Slave Mode .............................................................. 145
Slave Select ............................................................. 139
Slave Select Synchronization .................................. 145
SPI Clock ................................................................. 144
Typical Connection .................................................. 143
Associated Registers ............................................... 245
Typical SPI Master/Slave Connection ..................... 143
R/W Bit ............................................................ 152, 153
PIC18F/LF1XK50
DS41350D-page 415