PIC24F08KA102-I/SP Microchip Technology, PIC24F08KA102-I/SP Datasheet - Page 49

IC PIC MCU FLASH 8K 28-DIP

PIC24F08KA102-I/SP

Manufacturer Part Number
PIC24F08KA102-I/SP
Description
IC PIC MCU FLASH 8K 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F08KA102-I/SP

Core Size
16-Bit
Program Memory Size
8KB (2.75K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC24
No. Of I/o's
24
Eeprom Memory Size
512Byte
Ram Memory Size
1.5KB
Cpu Speed
32MHz
No. Of Timers
3
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
 Details
EXAMPLE 5-2:
© 2009 Microchip Technology Inc.
// C example using MPLAB C30
int __attribute__ ((space(auto_psv))) progAddr = &progAddr; // Variable located in Pgm Memory
//Set up pointer to the first memory location to be written
unsigned int offset;
TBLPAG = __builtin_tblpage(&progAddr);
offset = &progAddr & 0xFFFF;
__builtin_tblwtl(offset, 0x0000);
NVMCON = 0x4058;
asm("DISI #5");
__builtin_write_NVM();
ERASING A PROGRAM MEMORY ROW – ‘C’ LANGUAGE CODE
Preliminary
PIC24F16KA102 FAMILY
// Initialize PM Page Boundary SFR
// Initialize lower word of address
// Set base address of erase block
// with dummy latch write
// Initialize NVMCON
// Block all interrupts for next 5 instructions
// C30 function to perform unlock
// sequence and set WR
DS39927B-page 47

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