PIC18LF13K50-I/P Microchip Technology, PIC18LF13K50-I/P Datasheet - Page 197
![IC PIC MCU FLASH 4KX16 20-PDIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18LF13K50-I/P
Manufacturer Part Number
PIC18LF13K50-I/P
Description
IC PIC MCU FLASH 4KX16 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F13K50-ISO.pdf
(414 pages)
Specifications of PIC18LF13K50-I/P
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
15
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F13K50-ISO PDF datasheet #5
- Current page: 197 of 420
- Download datasheet (4Mb)
16.3.1
The EUSART module supports automatic detection
and calibration of the baud rate.
In the Auto-Baud Detect (ABD) mode, the clock to the
BRG is reversed. Rather than the BRG clocking the
incoming RX signal, the RX signal is timing the BRG.
The Baud Rate Generator is used to time the period of
a received 55h (ASCII “U”) which is the Sync character
for the LIN bus. The unique feature of this character is
that it has five rising edges including the Stop bit edge.
Setting the ABDEN bit of the BAUDCON register starts
the auto-baud calibration sequence
While the ABD sequence takes place, the EUSART
state machine is held in Idle. On the first rising edge of
the receive line, after the Start bit, the SPBRG begins
counting up using the BRG counter clock as shown in
Table
at the end of the eighth bit period. At that time, an
accumulated value totaling the proper BRG period is
left in the SPBRGH:SPBRG register pair, the ABDEN
bit is automatically cleared, and the RCIF interrupt flag
is set. A read operation on the RCREG needs to be
performed to clear the RCIF interrupt. RCREG content
should be discarded. When calibrating for modes that
do not use the SPBRGH register the user can verify
that the SPBRG register did not overflow by checking
for 00h in the SPBRGH register.
The BRG auto-baud clock is determined by the BRG16
and BRGH bits as shown in
both the SPBRGH and SPBRG registers are used as a
16-bit counter, independent of the BRG16 bit setting.
While calibrating the baud rate period, the SPBRGH
FIGURE 16-6:
2010 Microchip Technology Inc.
BRG Value
BRG Clock
ABDEN bit
RCIF bit
(Interrupt)
SPBRGH
RCREG
16-6. The fifth rising edge will occur on the RX pin
SPBRG
RX pin
RCIDL
Note 1:
Read
AUTO-BAUD DETECT
Set by User
The ABD sequence requires the EUSART module to be configured in Asynchronous mode.
XXXXh
AUTOMATIC BAUD RATE CALIBRATION
Table
0000h
16-6. During ABD,
(Figure
Start
bit 0
XXh
XXh
Edge #1
16-6).
Preliminary
bit 1
bit 2
Edge #2
and SPBRG registers are clocked at 1/8th the BRG
base clock rate. The resulting byte measurement is the
average bit time when clocked at full speed.
TABLE 16-6:
BRG16
Note:
Note 1: If the WUE bit is set with the ABDEN bit,
bit 3
0
0
1
1
2: It is up to the user to determine that the
3: During
bit 4
PIC18F/LF1XK50
Edge #3
BRGH
During the ABD sequence, SPBRG and
SPBRGH registers are both used as a 16-bit
counter, independent of BRG16 setting.
auto-baud detection will occur on the byte
following the Break character (see
Section 16.3.3
Break”).
incoming character baud rate is within the
range of the selected BRG clock source.
Some combinations of oscillator frequency
and EUSART baud rates are not possible.
auto-baud counter starts counting at 1.
Upon
sequence, to achieve maximum accuracy,
subtract 1 from the SPBRGH:SPBRG
register pair.
0
1
0
1
bit 5
BRG COUNTER CLOCK RATES
completion
the
BRG Base
bit 6
Edge #4
F
F
F
F
Clock
OSC
OSC
OSC
OSC
auto-baud
bit 7
/64
/16
/16
/4
“Auto-Wake-up
of
DS41350E-page 197
Stop bit
Edge #5
the
Auto Cleared
process,
BRG ABD
001Ch
F
F
F
F
1Ch
00h
OSC
OSC
OSC
Clock
OSC
auto-baud
/512
/128
/128
/32
the
on
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