PIC18F26K20-I/SS Microchip Technology, PIC18F26K20-I/SS Datasheet - Page 445

• Manufacturer Part Number: PIC18F26K20-I/SS
• Description: IC PIC MCU FLASH 32KX16 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/SS

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.84375KB
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

CONFIG6L Register ......................................................... 305
CONFIG7H Register ........................................................ 306
CONFIG7L Register ......................................................... 306
Configuration Bits ............................................................. 300
Configuration Register Protection .................................... 313
Context Saving During Interrupts ..................................... 119
CPFSEQ .......................................................................... 332
CPFSGT .......................................................................... 333
CPFSLT ........................................................................... 333
Customer Change Notification Service ............................ 453
Customer Notification Service .......................................... 453
Customer Support ............................................................ 453
CV
D
Data Addressing Modes ..................................................... 83
Data EEPROM
Data EEPROM Memory ..................................................... 99
Data Memory ..................................................................... 71
DAW ................................................................................. 334
DC and AC Characteristics
DC Characteristics
DCFSNZ .......................................................................... 335
DECF ............................................................................... 334
DECFSZ ........................................................................... 335
Development Support ...................................................... 365
Device Differences ........................................................... 442
Device Overview ................................................................ 11
 2010 Microchip Technology Inc.
REF
Comparing Addressing Modes with the
Direct .......................................................................... 83
Indexed Literal Offset ................................................. 85
Indirect ....................................................................... 83
Inherent and Literal .................................................... 83
Code Protection ....................................................... 313
Associated Registers ............................................... 103
EEADR and EEADRH Registers ............................... 99
EECON1 and EECON2 Registers ............................. 99
Operation During Code-Protect ............................... 102
Protection Against Spurious Write ........................... 102
Reading .................................................................... 101
Using ........................................................................ 102
Write Verify .............................................................. 101
Writing ...................................................................... 101
Access Bank .............................................................. 77
and the Extended Instruction Set ............................... 85
Bank Select Register (BSR) ....................................... 71
General Purpose Registers ........................................ 77
Map for PIC18F23K20/43K20 .................................... 72
Map for PIC18F24K20/44K20 .................................... 73
Map for PIC18F25K20/45K20 .............................. 74, 75
Special Function Registers ........................................ 77
Graphs and Tables .................................................. 403
Input/Output ............................................................. 377
Peripheral Supply Current ........................................ 376
Power-Down Current ............................................... 371
Primary Idle Supply Current ..................................... 374
Primary Run Supply Current .................................... 374
RC Idle Supply Current ............................................ 373
RC Run Supply Current ........................................... 372
Secondary Oscillator Supply Current ....................... 375
Supply Voltage ......................................................... 371
Details on Individual Family Members ....................... 12
New Core Features .................................................... 11
Other Special Features .............................................. 12
Voltage Reference Specifications ........................ 381
Extended Instruction Set Enabled ..................... 86
Instructions Affected .......................................... 85
Device Reset Timers ......................................................... 55
DEVID1 Register ............................................................. 307
DEVID2 Register ............................................................. 307
Direct Addressing .............................................................. 84
E
ECCPAS Register ............................................................ 183
EECON1 Register ...................................................... 91, 100
Effect on Standard PIC Instructions ................................. 362
Effects of Power Managed Modes on Various
Effects of Reset
Electrical Characteristics ................................................. 369
Enhanced Capture/Compare/PWM (ECCP) .................... 173
Enhanced Universal Synchronous Asynchronous
Errata ................................................................................. 10
EUSART .......................................................................... 237
PIC18F2XK20/4XK20
PLL Lock Time-out .................................................... 55
Power-up Timer (PWRT) ........................................... 55
Time-out Sequence ................................................... 55
Clock Sources ........................................................... 36
PWM mode .............................................................. 152
Associated Registers ............................................... 191
Capture and Compare Modes ................................. 174
Capture Mode. See Capture (ECCP Module).
Enhanced PWM Mode ............................................. 175
Outputs and Configuration ....................................... 174
Standard PWM Mode .............................................. 174
Timer Resources ..................................................... 174
Receiver Transmitter (EUSART) ............................. 237
Asynchronous Mode ................................................ 239
Baud Rate Generator (BRG)
Clock polarity
Data polarity
Auto-Restart .................................................... 184
Auto-shutdown ................................................ 183
Direction Change in Full-Bridge
Full-Bridge Application ..................................... 179
Full-Bridge Mode ............................................. 179
Half-Bridge Application .................................... 178
Half-Bridge Application Examples ................... 185
Half-Bridge Mode ............................................. 178
Output Relationships (Active-High and
Output Relationships Diagram ......................... 177
Programmable Dead Band Delay .................... 185
Shoot-through Current ..................................... 185
Start-up Considerations ................................... 182
12-bit Break Transmit and Receive ................. 256
Associated Registers, Receive ........................ 245
Associated Registers, Transmit ....................... 241
Auto-Wake-up on Break .................................. 254
Baud Rate Generator (BRG) ........................... 249
Clock Accuracy ................................................ 246
Receiver .......................................................... 242
Setting up 9-bit Mode with Address Detect ..... 244
Transmitter ...................................................... 239
Associated Registers ....................................... 249
Auto Baud Rate Detect .................................... 253
Baud Rate Error, Calculating ........................... 249
Baud Rates, Asynchronous Modes ................. 250
Formulas .......................................................... 249
High Baud Rate Select (BRGH Bit) ................. 249
Synchronous Mode .......................................... 257
Asychronous Receive ...................................... 242
Asychronous Transmit ..................................... 239
Output Mode ............................................ 181
Active-Low) .............................................. 176
DS41303G-page 445