PIC16F1937-I/ML Microchip Technology, PIC16F1937-I/ML Datasheet - Page 3

IC PIC MCU FLASH 512KX14 44-QFN

PIC16F1937-I/ML

Manufacturer Part Number
PIC16F1937-I/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/ML

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16F
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Silicon Errata Issues
1. Module: Data EE Memory
1.1 Data EE Memory Endurance
1.2 Data EE Write at Min. V
2. Module: Program Flash Memory (PFM)
2.1 Program Flash Memory Endurance
 2010 Microchip Technology Inc.
Note:
The typical write/erase endurance of the Data EE
Memory is limited to 10k cycles.
Work around
Use error correction method that stores data in
multiple locations.
Affected Silicon Revisions
The minimum voltage required for a Data EE write
operation is 2.0 volts.
Work around
None.
Affected Silicon Revisions
The typical write/erase endurance of the PFM is
limited to 1k cycles when V
Endurance degrades when V
Work around
Use an error correction method that stores data
in multiple locations.
Affected Silicon Revisions
A2
A2
A2
X
X
X
PIC16F1934/1936/1937 and PIC16LF1934/1936/1937
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A6).
A3
A3
A3
X
X
X
A5
A5
A5
X
X
X
A6
A6
A6
X
DD
DD
DD
is above 3.0 volts.
is below 3V.
2.2 Program Flash Memory writes at Min. V
3. Module: Capture Compare PWM (CCP)
3.1 Dead Band Delay
3.2 ECCP2 Switching Between Single, Half-
3.3 ECCP2 Changing Direction in Full-Bridge
The minimum voltage required for a PFM write
operation is 2.0V.
Work around
None.
Affected Silicon Revisions
With the ECCP configured for PWM half-bridge
mode and a dead-band delay greater than or equal
to the PWM duty cycle; unpredictable wave forms
will result.
Work around
Make sure the dead-band delay is always less
than the PWM duty cycle.
Affected Silicon Revisions
Bridge and Full-Bridge PWM modes
Switching PWM mode during the current PWM
cycle by modifying the P2M[1:0] bits in the
CCP2CON register will cause the PWM outputs to
switch immediately and not on the start of the next
PWM cycle.
Work around
None.
Affected Silicon Revisions
PWM modes
When
modulated outputs will improperly go active at the
same time and the dead time does not occur which
can lead to large shoot-through currents.
Work around
None.
Affected Silicon Revisions
A2
A2
A2
A2
X
X
X
X
A3
A3
A3
A3
X
X
X
changing
X
A5
A5
A5
A5
X
X
X
X
A6
A6
A6
A6
direction
X
X
X
X
the
DS80479F-page 3
active
DD
and

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