PIC18F13K22-I/P Microchip Technology, PIC18F13K22-I/P Datasheet - Page 357
![IC MCU 8BIT 8KB FLASH 20DIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18F13K22-I/P
Manufacturer Part Number
PIC18F13K22-I/P
Description
IC MCU 8BIT 8KB FLASH 20DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF13K22-ISS.pdf
(388 pages)
2.PIC18LF13K22-ISS.pdf
(12 pages)
3.PIC18F13K22-ISS.pdf
(382 pages)
Specifications of PIC18F13K22-I/P
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, MSSP, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
20PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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FIGURE 25-14:
TABLE 25-9:
2010 Microchip Technology Inc.
130
131
132
135
TBD
Legend: TBD = To Be Determined
Note 1:
Param
No.
2:
3:
4:
A/D DATA
Note 1:
SAMPLE
A/D CLK
T
T
T
T
T
ADRES
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
SWC
DIS
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
GO
2:
Q4
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D CONVERSION REQUIREMENTS
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert Sample
Discharge Time
132
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
(3)
9
to V
SS
8
or V
OLD_DATA
SS
(2)
7
Preliminary
to V
DD
.. .
SAMPLING STOPPED
PIC18F1XK22/LF1XK22
CY
). The source impedance (R
CY
is added before the A/D clock starts.
cycle.
. . .
131
130
Min.
TBD
TBD
0.7
0.7
1.4
0.2
11
—
2
(Note 4)
25.0
4.0
Max.
12
—
—
—
1
(1)
(1)
1
Units
T
s
s
s
s
s
s
AD
S
) on the input channels is 50 .
0
T
-40°C to 85°C
T
125°C
A/D RC mode
-40C to +85C
0C to +85C
OSC
OSC
AD
based, V
based, V
clock divider.
NEW_DATA
DONE
Conditions
DS41365D-page 357
T
CY
REF
REF
3.0V to
3.0V,
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