PIC18F13K50-I/SO Microchip Technology, PIC18F13K50-I/SO Datasheet - Page 183

• Manufacturer Part Number: PIC18F13K50-I/SO
• Description: IC PIC MCU FLASH 8K 1.8V 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K50-I/SO

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

FIGURE 16-4:
TABLE 16-1:
© 2009 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
RCSTA
TXREG
TXSTA
BAUDCON
SPBRGH
SPBRG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
(Interrupt Reg. Flag)
Note:
Reg. Empty Flag)
Name
Write to TXREG
(Transmit Shift
BRG Output
(Shift Clock)
RB7/TX/CK
TRMT bit
TXIF bit
This timing diagram shows two consecutive transmissions.
EUSART Transmit Register
EUSART Baud Rate Generator Register, High Byte
EUSART Baud Rate Generator Register, Low Byte
pin
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
—
—
—
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
1 T
CY
Transmit Shift Reg
Word 1
Word 1
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
Start bit
Word 2
DTRXP
SREN
TXEN
RCIE
RCIP
RCIF
Bit 5
PIC18F1XK50/PIC18LF1XK50
1 T
CY
bit 0
Preliminary
CKTXP
INT0IE
CREN
SYNC
Bit 4
TXIF
TXIE
TXIP
bit 1
Word 1
ADDEN
SENDB
BRG16
RABIE
SSPIF
SSPIE
SSPIP
Bit 3
TMR0IF
CCP1IF
CCP1IE
CCP1IP
BRGH
FERR
Bit 2
—
bit 7/8
TMR2IF
TMR2IE
TMR2IP
Word 2
Transmit Shift Reg
INT0IF
OERR
TRMT
Stop bit
WUE
Bit 1
Start bit
TMR1IE
TMR1IP
TMR1IF
ABDEN
RABIF
RX9D
DS41350C-page 181
TX9D
Bit 0
Word 2
on page
Values
Reset
bit 0
279
282
282
282
281
281
281
281
281
281