ATMEGA48V-10AU Atmel, ATMEGA48V-10AU Datasheet - Page 24

IC AVR MCU 4K 10MHZ 1.8V 32TQFP

ATMEGA48V-10AU

Manufacturer Part Number
ATMEGA48V-10AU
Description
IC AVR MCU 4K 10MHZ 1.8V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48V-10AU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USART/Serial
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
32-pin TQFP
Programmable Memory
4K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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24
ATmega48/88/168
3. Watchdog Timer Interrupt disabled
4. Start-up time with Crystal Oscillator is higher than expected
5. High Power Consumption in Power-down with External Clock
6. Asynchronous Oscillator does not stop in Power-down
7. Interrupts may be lost when writing the timer registers in the asynchronous timer
If it is necessary to read an EEPROM location after Erase Only, use an Atomic Write opera-
tion with 0xFF as data in order to erase a location. In any case, the Write Only operation can
be used as intended. Thus no special considerations are needed as long as the erased loca-
tion is not read before it is programmed.
If the watchdog timer interrupt flag is not cleared before a new timeout occurs, the watchdog
will be disabled, and the interrupt flag will automatically be cleared. This is only applicable in
interrupt only mode. If the Watchdog is configured to reset the device in the watchdog time-
out following an interrupt, the device works correctly.
Problem fix / Workaround
Make sure there is enough time to always service the first timeout event before a new
watchdog timeout occurs. This is done by selecting a long enough time-out period.
The clock counting part of the start-up time is about 2 times higher than expected for all
start-up periods when running on an external Crystal. This applies only when waking up by
reset. Wake-up from power down is not affected. For most settings, the clock counting parts
is a small fraction of the overall start-up time, and thus, the problem can be ignored. The
exception is when using a very low frequency crystal like for instance a 32 kHz clock crystal.
Problem fix / Workaround
No known workaround.
The power consumption in power down with an active external clock is about 10 times
higher than when using internal RC or external oscillators.
Problem fix / Workaround
Stop the external clock when the device is in power down.
The Asynchronous oscillator does not stop when entering power down mode. This leads to
higher power consumption than expected.
Problem fix / Workaround
Manually disable the asynchronous timer before entering power down.
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
Problem Fix/Workaround
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-
pare interrupt routine where the compare register is not 0xFF, or if the compare register is
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.
2545LS–AVR–08/07

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