PIC18F24K20-I/SP Microchip Technology, PIC18F24K20-I/SP Datasheet - Page 162
![IC PIC MCU FLASH 8KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F24K20-I/SP
Manufacturer Part Number
PIC18F24K20-I/SP
Description
IC PIC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F24K20-I/SP
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F25K20T-ISS PDF datasheet #3
- PIC18F25K20T-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 162 of 456
- Download datasheet (4Mb)
PIC18F2XK20/4XK20
13.5
Timer1 can be configured for 16-bit reads and writes
(see Figure 13-2). When the RD16 control bit of the
T1CON register is set, the address for TMR1H is
mapped to a buffer register for the high byte of Timer1.
A read from TMR1L will load the contents of the high
byte of Timer1 into the Timer1 high byte buffer. This
provides the user with the ability to accurately read all
16 bits of Timer1 without the need to determine
whether a read of the high byte, followed by a read of
the low byte, has become invalid due to a rollover or
carry between reads.
Writing to TMR1H does not directly affect Timer1.
Instead, the high byte of Timer1 is updated with the
contents of TMR1H when a write occurs to TMR1L.
This allows all 16 bits of Timer1 to be updated at once.
The high byte of Timer1 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer1 High Byte Buffer register.
Writes to TMR1H do not clear the Timer1 prescaler.
The prescaler is only cleared on writes to TMR1L.
13.6
An on-chip crystal oscillator circuit is incorporated
between pins T1OSI (input) and T1OSO (amplifier
output). It is enabled by setting the Timer1 Oscillator
Enable bit, T1OSCEN of the T1CON register. The
oscillator is a low-power circuit rated for 32 kHz crystals.
It will continue to run during all power-managed modes.
The circuit for a typical LP oscillator is shown in
Figure 13-4. Table 13-1 shows the capacitor selection
for the Timer1 oscillator.
The user must provide a software time delay to ensure
proper start-up of the Timer1 oscillator.
FIGURE 13-4:
DS41303G-page 162
Note:
Timer1 16-Bit Read/Write Mode
Timer1 Oscillator
27 pF
27 pF
C1
C2
See the Notes with Table 13-1 for additional
information about capacitor selection.
32.768 kHz
XTAL
EXTERNAL
COMPONENTS FOR THE
TIMER1 LP OSCILLATOR
T1OSI
T1OSO
PIC
®
MCU
TABLE 13-1:
13.6.1
The Timer1 oscillator is also available as a clock
source in power-managed modes. By setting the clock
select bits, SCS<1:0> of the OSCCON register, to ‘01’,
the device switches to SEC_RUN mode; both the CPU
and peripherals are clocked from the Timer1 oscillator.
If the IDLEN bit of the OSCCON register is cleared and
a SLEEP instruction is executed, the device enters
SEC_IDLE mode. Additional details are available in
Section 3.0 “Power-Managed Modes”.
Whenever the Timer1 oscillator is providing the clock
source, the Timer1 system clock status flag, T1RUN of
the T1CON register, is set. This can be used to deter-
mine the controller’s current clocking mode. It can also
indicate which clock source is currently being used by
the Fail-Safe Clock Monitor. If the Clock Monitor is
enabled and the Timer1 oscillator fails while providing
the clock, polling the T1RUN bit will indicate whether
the clock is being provided by the Timer1 oscillator or
another source.
Osc Type
Note 1: Microchip suggests these values only as a
LP
2: Higher capacitance increases the stability
3: Since each resonator/crystal has its own
4: Capacitor values are for design guidance
USING TIMER1 AS A
CLOCK SOURCE
starting point in validating the oscillator
circuit.
of the oscillator but also increases the
start-up time.
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate values of external
components.
only.
32 kHz
Freq
CAPACITOR SELECTION FOR
THE TIMER OSCILLATOR
2010 Microchip Technology Inc.
27 pF
C1
(1)
27 pF
C2
(1)
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