PIC16F726-I/ML Microchip Technology, PIC16F726-I/ML Datasheet - Page 190
![IC PIC MCU FLASH 8KX14 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F726-I/ML
Manufacturer Part Number
PIC16F726-I/ML
Description
IC PIC MCU FLASH 8KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.AC164112.pdf
(302 pages)
2.PIC16F722-ISS.pdf
(8 pages)
3.PIC16F722-ISS.pdf
(10 pages)
4.PIC16F722-ISS.pdf
(32 pages)
5.PIC16F722-ISS.pdf
(2 pages)
6.PIC16F722-ISS.pdf
(8 pages)
7.PIC16LF724-IPT.pdf
(266 pages)
Specifications of PIC16F726-I/ML
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- AC164112 PDF datasheet
- PIC16F722-ISS PDF datasheet #2
- PIC16F722-ISS PDF datasheet #3
- PIC16F722-ISS PDF datasheet #4
- PIC16F722-ISS PDF datasheet #5
- PIC16F722-ISS PDF datasheet #6
- PIC16LF724-IPT PDF datasheet #7
- Current page: 190 of 266
- Download datasheet (5Mb)
PIC16F72X/PIC16LF72X
REGISTER 17-5:
REGISTER 17-6:
TABLE 17-7:
DS41341A-page 188
INTCON
PIR1
PIE1
SSPBUF
SSPADD
SSPCON
SSPMSK
SSPSTAT
TRISC
Legend:
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Name
R/W-1
MSK7
R/W-0
ADD7
2:
(2)
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by SSP module in I
mode.
Maintain these bits clear in I
Accessible only when SSPM<3:0> = 1001.
Synchronous Serial Port Receive Buffer/Transmit Register
Synchronous Serial Port (I
Synchronous Serial Port (I
TMR1GIE
TMR1GIF
TRISC7
SMP
WCOL
MSK<7:1>: Mask bits
1 = The received address bit n is compared to SSPADD<n> to detect I
0 = The received address bit n is not used to detect I
MSK<0>: Mask bit for I
I
1 = The received address bit ‘0’ is compared to SSPADD<0> to detect I
0 = The received address bit ‘0’ is not used to detect I
All other SSP modes: this bit has no effect.
ADD<7:0>: Address bits
Received address
Bit 7
GIE
2
C Slave Mode, 10-bit Address (SSPM<3:0> = 0111):
REGISTERS ASSOCIATED WITH I
(1)
R/W-1
MSK6
R/W-0
ADD6
SSPMSK: SSP MASK REGISTER
SSPADD: SSP I
SSPOV
TRISC6
CKE
PEIE
ADIF
ADIE
Bit 6
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-1
R/W-0
MSK5
ADD5
TRISC5
SSPEN
2
RCIF
RCIE
2
2
Bit 5
T0IE
C mode.
2
D/A
C mode) Address Register
C mode) Address Mask Register
C Slave Mode, 10-bit Address
2
C ADDRESS REGISTER
TRISC4 TRISC3
Bit 4
INTE
TXIF
TXIE
CKP
P
R/W-1
MSK4
R/W-0
ADD4
Preliminary
SSPM3
SSPIF
SSPIE
RBIE
Bit 3
S
2
C OPERATION
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
R/W-0
CCP1IE
MSK3
ADD3
CCP1IF
TRISC2
SSPM2
2
Bit 2
T0IF
R/W
C address match
2
C address match
TMR2IE
TMR2IF
TRISC1
SSPM1
Bit 1
INTF
UA
R/W-1
MSK2
R/W-0
ADD2
2
C address match
2
C address match
TMR1IF
TMR1IE
TRISC0
SSPM0
RBIF
Bit 0
BF
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
0000 000x
0000 0000
0000 0000
xxxx xxxx
0000 0000
0000 0000
1111 1111
0000 0000
1111 1111
POR, BOR
R/W-1
R/W-0
MSK1
ADD1
Value on
0000 000u
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
1111 1111
0000 0000
1111 1111
Value on
all other
R/W-1
MSK0
R/W-0
ADD0
Resets
bit 0
bit 0
2
C
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