PIC18F24K20-I/ML Microchip Technology, PIC18F24K20-I/ML Datasheet - Page 5
![IC PIC MCU FLASH 8KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F24K20-I/ML
Manufacturer Part Number
PIC18F24K20-I/ML
Description
IC PIC MCU FLASH 8KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F24K20-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Height
0.88 mm
Length
6 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V
Width
6 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
15. Module: High Low Voltage Detect (HLVD)
16. Module: BOR
17. Module: System Clocks
© 2009 Microchip Technology Inc.
The IVRST bit of the HLVDCON register activates
prematurely (Rev. A4 and A7 only).
Work around
Wait an additional 20 µs after IVRST is sensed
high before using the fixed voltage reference.
Enable the FVR by setting the FVREN bit of the
CVRCON2 register before activating any periph-
eral that automatically enables the FVR. Peripher-
als that automatically enable the FVR include the
Brown-out Reset, the High/Low Voltage Detect,
and the HFINTOSC.
Affected Silicon Revisions
An unexpected Brown-out Reset may occur when
the fixed voltage reference is inactive and BOR is
activated, thereby activating the fixed voltage
reference simultaneously. This error is caused by
a premature FVRST stable flag (Rev. A4 and A7
only).
Work around
Enable the FVR by setting the FVREN bit of the
CVRCON2 register and then wait an additional
20 µs after FVRST is sensed high before
enabling BOR. Brown-out disable in Sleep mode
with automatic enable on wake-up cannot be used.
Affected Silicon Revisions
HFINTOSC output frequency is 16 MHz ± 3%
25°C to 85°C.
Work around
None.
Affected Silicon Revisions
A4
A4
A4
X
X
X
A7
A7
A7
X
X
X
A9
A9
A9
X
AB
AB
AB
X
PIC18F24/25/44/45K20
18. Module: POR/BOR
19. Module: POR
20. Module: POR
The POR rearm voltage may be below the low end
of the BOR range causing unexpected code
execution below the BOR range.
Work around
Use external power monitor to hold device in
Reset below 1.1 Volts.
Affected Silicon Revisions
The POR may release around 0.8 volts (below the
POR rearm voltage of 1.2V nominal) when V
rises from below either 0.60V (when BOR is not
enabled) or 0.33V (when BOR is enabled).
Work around
Use Power-up Timer when operating with the EC,
EXTRC or HFINTOSC oscillator modes. Ensure that
V
Affected Silicon Revisions
The part may hang in the Reset state when V
rises to the operating range at a rate faster than
7500 volts per second. Recovery from the hung
state is possible only by first lowering V
0.3V followed by raising V
range.
Work around
Slow V
between the voltage supply and the V
increasing the V
bypassing should remain on the pin side of the
series resistor.
Affected Silicon Revisions
DD
A4
A4
A4
X
X
X
rise time is less than the Power-up Timer time.
DD
A7
A7
A7
X
X
X
rise time by adding series resistance
A9
A9
A9
X
X
X
DD
AB
AB
AB
X
X
X
bypass capacitance. V
DD
to the operating
DS80366G-page 5
DD
DD
to below
pin and
DD
DD
DD