PIC18F13K50-I/SS Microchip Technology, PIC18F13K50-I/SS Datasheet - Page 234
![IC PIC MCU FLASH 8KB 20-SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC18F13K50-I/SS
Manufacturer Part Number
PIC18F13K50-I/SS
Description
IC PIC MCU FLASH 8KB 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18F13K50-I/SS
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F13K50-I/SS
Manufacturer:
MICROCHIP
Quantity:
5
Part Number:
PIC18F13K50-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F14K50-IP PDF datasheet #5
- Current page: 234 of 422
- Download datasheet (5Mb)
PIC18F/LF1XK50
18.8
There are four additional comparator features:
• Simultaneous read of comparator outputs
• Internal reference selection
• Hysteresis selection
• Output Synchronization
18.8.1
The MC1OUT and MC2OUT bits of the CM2CON1
register are mirror copies of both comparator outputs.
The ability to read both outputs simultaneously from a
single register eliminates the timing skew of reading
separate registers.
18.8.2
There are two internal voltage references available to
the non-inverting input of each comparator. One of
these is the Fixed Voltage Reference (FVR) and the
other is the variable Comparator Voltage Reference
(CV
determines which of these references is routed to the
Comparator Voltage reference output (C
ther routing to the comparator is accomplished by the
CxR bit of the CMxCON0 register. See Section 21.1
“Voltage Reference” and Figure 18-2 and Figure 18-3
for more detail.
18.8.3
The Comparator Cx have selectable hysteresis. The
hysteresis can be enable by setting the CxHYS bit of
the CM2CON1 register. See Section 27.0 “Electrical
Specifications” for more details.
18.8.4
The Comparator Cx output can be synchronized with
Timer1 by setting the CxSYNC bit of the CM2CON1
register. When enabled, the Cx output is latched on
the rising edge of the Timer1 source clock. If a pres-
caler is used with Timer1, the comparator output is
latched after the prescaling function. To prevent a
race condition, the comparator output is latched on
the rising edge of the Timer1 clock source and Timer1
increments on the rising edge of its clock source. See
the Comparator Block Diagram (Figure 18-2 and
Figure 18-3)
(Figure 18-2) for more information.
DS41350D-page 234
Note 1: Obtaining the status of C1OUT or C2OUT
REF
). The CxRSEL bit of the CM2CON register
Additional Comparator Features
SIMULTANEOUS COMPARATOR
OUTPUT READ
INTERNAL REFERENCE
SELECTION
COMPARATOR HYSTERESIS
SYNCHRONIZING COMPARATOR
OUTPUT TO TIMER 1
by reading CM2CON1 does not affect the
comparator interrupt mismatch registers.
and
the
Timer1
Block
X
V
REF
Diagram
). Fur-
Preliminary
2010 Microchip Technology Inc.
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