PIC24F04KA201-I/SO Microchip Technology, PIC24F04KA201-I/SO Datasheet - Page 13

• Manufacturer Part Number: PIC24F04KA201-I/SO
• Description: IC PIC MCU FLASH 512KX4 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA201-I/SO

• Core Size: 16-Bit
• Program Memory Size: 4KB (1.375K x 24)
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Number Of I /o: 18
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC24
• No. Of I/o's: 18
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.7
The procedure for writing the Configuration registers is
the same as for writing code memory. The only differ-
ence is that only one word is programmed in each
operation. When writing Configuration registers, one
word is programmed during each operation. Only work-
ing register, W0, is used as a temporary holding register
for the data to be programmed.
Table 3-6
Configuration registers.
Table 3-6
programming the Configuration registers, including the
serial pattern with the ICSP command code, which
must be transmitted, LSB first, using the PGCx and
PGDx pins (see
Reset vector is exited. In Step 2, the NVMCON register
is initialized for programming code memory. In Step 3,
the 24-bit starting destination address for programming
is loaded into the TBLPAG register and W7 register.
 2010 Microchip Technology Inc.
Note:
Note:
Writing Configuration Registers
provides the ICSP programming details for
provides
The TBLPAG register is hard-coded to
0xF8 (the upper byte address of all
locations of the Configuration registers).
The TBLPAG register must be loaded with
F8h.
Figure
the
3-2). In Step 1 of
default
values
Table
of
3-7, the
the
TABLE 3-6:
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
FDS
Note 1:
Configuration
Registers
(1)
PIC24FXXKA2XX
The Configuration register, FICD, is a
reserved location and should be
programmed with the default value given
above.
DEFAULT VALUES FOR
CONFIGURATION REGISTER
SERIAL INSTRUCTION
Value
FFh
DFh
FBh
C3h
FFh
03h
87h
DS39991A-page 13