PIC16F690-I/SS Microchip Technology, PIC16F690-I/SS Datasheet - Page 162

IC PIC MCU FLASH 4KX14 20SSOP

PIC16F690-I/SS

Manufacturer Part Number
PIC16F690-I/SS
Description
IC PIC MCU FLASH 4KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F690-I/SS

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SPI/SSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-1, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F631/677/685/687/689/690
12.2
The factory calibrates the internal oscillator block out-
put (INTOSC). However, the INTOSC frequency may
drift as V
affects the asynchronous baud rate. Two methods may
be used to adjust the baud rate clock, but both require
a reference clock source of some kind.
REGISTER 12-1:
DS41262E-page 160
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
CSRC
Clock Accuracy with
Asynchronous Operation
DD
SREN/CREN overrides TXEN in Sync mode.
or temperature changes, and this directly
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 =
0 =
TX9: 9-bit Transmit Enable bit
1 =
0 =
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: Ninth bit of Transmit Data
Can be address/data bit or a parity bit.
R/W-0
TX9
Master mode (clock generated internally from BRG)
Slave mode (clock from external source)
Selects 9-bit transmission
Selects 8-bit transmission
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
TXEN
R/W-0
(1)
(1)
R/W-0
SYNC
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SENDB
R/W-0
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output. Adjusting the
value in the OSCTUNE register allows for fine resolution
changes to the system clock source. See Section 3.5
“Internal Clock Modes” for more information.
The other method adjusts the value in the Baud Rate
Generator. This can be done automatically with the
Auto-Baud
“Auto-Baud Detect”). There may not be fine enough
resolution when adjusting the Baud Rate Generator to
compensate for a gradual change in the peripheral
clock frequency.
Detect
BRGH
R/W-0
feature
© 2008 Microchip Technology Inc.
x = Bit is unknown
TRMT
R-1
(see
Section 12.3.1
R/W-0
TX9D
bit 0

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