AT89LS52-16JU Atmel, AT89LS52-16JU Datasheet - Page 6

IC MCU 8K FLASH 16MHZ 44-PLCC

AT89LS52-16JU

Manufacturer Part Number
AT89LS52-16JU
Description
IC MCU 8K FLASH 16MHZ 44-PLCC
Manufacturer
Atmel
Series
89LSr
Datasheet

Specifications of AT89LS52-16JU

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Cpu Family
89LS
Device Core
8051
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
256Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
4V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Package
44PLCC
Family Name
89LS
Maximum Speed
16 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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4.10
4.11
4.12
5. Special Function Registers
6
EA/VPP
XTAL1
XTAL2
AT89LS52
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to V
This pin also receives the 12-volt programming enable voltage (V
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in
2) and T2MOD (shown in
Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can
be set for each of the six interrupt sources in the IP register.
5-1.
Table
CC
for internal program executions.
10-2) for Timer 2. The register pair (RCAP2H, RCAP2L) are the
PP
) during Flash programming.
2601C–MICRO–06/08
Table 5-

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